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XCR3064XL-7CPG56C

XCR3064XL-7CPG56C

XCR3064XL-7CPG56C

Xilinx

0.5mm PMIC 56 Pin 3.3V

SOT-23

XCR3064XL-7CPG56C Datasheet

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Specifications
Name Value
Type Parameter
Mount Surface Mount
Number of Pins 56
JESD-609 Code e1
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 56
ECCN Code EAR99
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature YES
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.5mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 56
Qualification Status Not Qualified
Operating Supply Voltage 3.3V
Supply Voltage-Max (Vsup) 3.6V
Temperature Grade COMMERCIAL
Number of I/O 48
Memory Type EEPROM
Propagation Delay 7.5 ns
Frequency (Max) 119MHz
Programmable Logic Type EE PLD
Number of Gates 1500
Number of Logic Blocks (LABs) 4
Speed Grade 7
Output Function MACROCELL
Number of Macro Cells 64
JTAG BST YES
In-System Programmable YES
Length 6mm
Height Seated (Max) 1.35mm
Width 6mm
RoHS Status RoHS Compliant
XCR3064XL-7CPG56C Product Details

XCR3064XL-7CPG56C Overview


A mobile phone network consists of 64macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).There are 48 I/Os programmed in it.The device is programmed with 56 terminations.As the terminal position of this electrical part is BOTTOM, it serves as an important access point for passengers and freight.Power is provided by a supply voltage of 3.3V volts.It is included in Programmable Logic Devices.The chip is programmed with 56 pins.When using this device, YES can also be found.1500 gates are devices that serve as building blocks for digital circuits.For high efficiency, the supply voltage should be maintained at 3.3V.In order to store data, EEPROM is used.The electronic part is mounted by Surface Mount.The device is designed with pins 56.In this case, the maximum supply voltage (Vsup) reaches 3.6V.Ideally, the operating temperature should be greater than 0°C.It is recommended that the operating temperature be lower than 70°C.It is composed of 4 logic blocks (LABs).It is recommended that the maximal frequency be lower than 119MHz.Types of programmable logic are divided into EE PLD.

XCR3064XL-7CPG56C Features


48 I/Os
56 pin count
56 pins
4 logic blocks (LABs)


XCR3064XL-7CPG56C Applications


There are a lot of Xilinx
XCR3064XL-7CPG56C CPLDs applications.


  • Voltage level translation
  • Timing control
  • Interface bridging
  • I/O expansion
  • Discrete logic functions
  • Bootloaders for FPGAs
  • Address decoders
  • Custom state machines
  • Digital systems
  • Portable digital devices

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