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5M240ZM68C4

5M240ZM68C4

5M240ZM68C4

Altera

1.81.2/3.3V 0.5mm PMIC 68 Pin 1.8V TFBGA

SOT-23

5M240ZM68C4 Datasheet

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In-Stock: 0 items
Specifications
Name Value
Type Parameter
Mount Surface Mount
Package / Case TFBGA
Number of Pins 68
JESD-609 Code e0
Pbfree Code no
Number of Terminations 68
ECCN Code EAR99
Terminal Finish TIN LEAD
Max Operating Temperature 85°C
Min Operating Temperature 0°C
Additional Feature YES
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 235
Supply Voltage 1.8V
Terminal Pitch 0.5mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 68
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 1.89V
Power Supplies 1.81.2/3.3V
Temperature Grade OTHER
Supply Voltage-Min (Vsup) 1.71V
Number of I/O 52
Clock Frequency 184.1MHz
Propagation Delay 7.9 ns
Programmable Logic Type FLASH PLD
Number of Logic Blocks (LABs) 240
Output Function MACROCELL
Number of Macro Cells 192
JTAG BST YES
In-System Programmable YES
Length 5mm
Height Seated (Max) 1.2mm
Width 5mm
RoHS Status RoHS Compliant
5M240ZM68C4 Product Details

5M240ZM68C4 Overview


192 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.The item is enclosed in a TFBGA package.The device is programmed with 52 I/O ports.It is programmed to terminate devices at 68.There is a BOTTOM terminal position on the electrical part in question.The device is powered by a voltage of 1.8V volts.It is a part of the family Programmable Logic Devices.With 68 pins programmed, the chip is ready to use.When using this device, YES is also available.In this case, it is mounted by Surface Mount.The pins are 68.A power supply of 1.81.2/3.3V volts is required to operate this device.Initially, the maximum supply voltage (Vsup) is 1.89V.It is recommended that the operating temperature be higher than 0°C.It is recommended that the operating temperature be below 85°C.240 logic blocks (LABs) make up this circuit.Voltage supply (Vsup) should be higher than 1.71V.The clock frequency of this device should not exceed 184.1MHz.In programmable logic, a type of logic can be categorized as FLASH PLD.

5M240ZM68C4 Features


TFBGA package
52 I/Os
68 pin count
68 pins
1.81.2/3.3V power supplies
240 logic blocks (LABs)


5M240ZM68C4 Applications


There are a lot of Altera
5M240ZM68C4 CPLDs applications.


  • Digital systems
  • Portable digital devices
  • Handheld digital devices
  • Battery operated portable devices
  • Complex programmable logic devices
  • Digital designs
  • Field programmable gate
  • Address decoding
  • D/T registers and latches
  • Synchronous or asynchronous mode

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