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EPM5128JC-1

EPM5128JC-1

EPM5128JC-1

Altera

5V 1.27mm PMIC 5V

SOT-23

EPM5128JC-1 Datasheet

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Specifications
Name Value
Type Parameter
Surface Mount YES
JESD-609 Code e0
Pbfree Code no
Number of Terminations 68
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn/Pb)
Additional Feature LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form J BEND
Peak Reflow Temperature (Cel) 220
Supply Voltage 5V
Terminal Pitch 1.27mm
Time@Peak Reflow Temperature-Max (s) 20
Pin Count 68
JESD-30 Code S-CQCC-J68
Qualification Status Not Qualified
Operating Temperature (Max) 70°C
Supply Voltage-Max (Vsup) 5.25V
Power Supplies 5V
Temperature Grade COMMERCIAL
Supply Voltage-Min (Vsup) 4.75V
Number of I/O 52
Clock Frequency 50MHz
Propagation Delay 40 ns
Organization 7 DEDICATED INPUTS, 52 I/O
Programmable Logic Type UV PLD
Output Function MACROCELL
Number of Macro Cells 128
JTAG BST NO
Number of Dedicated Inputs 7
In-System Programmable NO
Length 24.13mm
Height Seated (Max) 5.08mm
Width 24.13mm
RoHS Status Non-RoHS Compliant
EPM5128JC-1 Product Details

EPM5128JC-1 Overview


128 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.The device is programmed with 52 I/O ports.It is programmed to terminate devices at 68.There is a QUAD terminal position on the electrical part in question.The device is powered by a voltage of 5V volts.It is a part of the family Programmable Logic Devices.With 68 pins programmed, the chip is ready to use.When using this device, LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK is also available.A power supply of 5V volts is required to operate this device.Initially, the maximum supply voltage (Vsup) is 5.25V.The status of input signals is determined by 7 dedicated inputs.Voltage supply (Vsup) should be higher than 4.75V.The clock frequency of this device should not exceed 50MHz.In programmable logic, a type of logic can be categorized as UV PLD.Operating temperatures should not exceed 70°C.

EPM5128JC-1 Features


52 I/Os
68 pin count
5V power supplies


EPM5128JC-1 Applications


There are a lot of Altera
EPM5128JC-1 CPLDs applications.


  • Digital systems
  • Portable digital devices
  • Handheld digital devices
  • Battery operated portable devices
  • Complex programmable logic devices
  • Digital designs
  • Field programmable gate
  • Address decoding
  • D/T registers and latches
  • Synchronous or asynchronous mode

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