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EPM5128LC-1

EPM5128LC-1

EPM5128LC-1

Altera

5V 1.27mm PMIC 5V

SOT-23

EPM5128LC-1 Datasheet

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Specifications
Name Value
Type Parameter
Surface Mount YES
JESD-609 Code e0
Pbfree Code no
Number of Terminations 68
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn/Pb)
Additional Feature LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form J BEND
Peak Reflow Temperature (Cel) 220
Supply Voltage 5V
Terminal Pitch 1.27mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 68
JESD-30 Code S-PQCC-J68
Qualification Status Not Qualified
Operating Temperature (Max) 70°C
Supply Voltage-Max (Vsup) 5.25V
Power Supplies 5V
Temperature Grade COMMERCIAL
Supply Voltage-Min (Vsup) 4.75V
Number of I/O 52
Clock Frequency 50MHz
Propagation Delay 40 ns
Organization 7 DEDICATED INPUTS, 52 I/O
Programmable Logic Type OT PLD
Output Function MACROCELL
Number of Macro Cells 128
JTAG BST NO
Number of Dedicated Inputs 7
In-System Programmable NO
RoHS Status Non-RoHS Compliant
EPM5128LC-1 Product Details

EPM5128LC-1 Overview


There are 128 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).It is programmed with 52 I/Os.There are 68 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.The terminal position of this electrical part is QUAD, which serves as an important access point for passengers or freight.It is powered from a supply voltage of 5V.This part is included in Programmable Logic Devices.It is equipped with 68 pin count.It is also characterized by LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK.It operates from 5V power supplies.The maximal supply voltage (Vsup) reaches 5.25V.There are 7 dedicated inputs used to detect the status of input signals.The supply voltage (Vsup) should be greater than 4.75V.Its clock frequency should not exceed 50MHz.This kind of FPGA is composed of OT PLD.The operating temperature should be kept below 70°C.

EPM5128LC-1 Features


52 I/Os
68 pin count
5V power supplies


EPM5128LC-1 Applications


There are a lot of Altera
EPM5128LC-1 CPLDs applications.


  • Power up sequencing
  • Voltage level translation
  • Timing control
  • Interface bridging
  • I/O expansion
  • Discrete logic functions
  • Bootloaders for FPGAs
  • Address decoders
  • Custom state machines
  • Digital systems

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