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EPM5130GM883B2

EPM5130GM883B2

EPM5130GM883B2

Altera

5V 2.54mm PMIC 5V

SOT-23

EPM5130GM883B2 Datasheet

non-compliant

In-Stock: 0 items
Specifications
Name Value
Type Parameter
Surface Mount NO
JESD-609 Code e0
Number of Terminations 100
ECCN Code 3A001.A.2.C
Terminal Finish Tin/Lead (Sn/Pb)
Additional Feature LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
HTS Code 8542.39.00.01
Terminal Position PERPENDICULAR
Terminal Form PIN/PEG
Supply Voltage 5V
Terminal Pitch 2.54mm
Pin Count 100
JESD-30 Code S-CPGA-P100
Qualification Status Not Qualified
Operating Temperature (Max) 125°C
Operating Temperature (Min) -55°C
Supply Voltage-Max (Vsup) 5.5V
Power Supplies 5V
Temperature Grade MILITARY
Supply Voltage-Min (Vsup) 4.5V
Number of I/O 64
Clock Frequency 40MHz
Propagation Delay 45 ns
Organization 19 DEDICATED INPUTS, 64 I/O
Programmable Logic Type UV PLD
Screening Level 38535Q/M;38534H;883B
Output Function MACROCELL
Number of Macro Cells 128
JTAG BST NO
Number of Dedicated Inputs 19
In-System Programmable NO
Length 33.528mm
Height Seated (Max) 3.81mm
Width 33.528mm
RoHS Status Non-RoHS Compliant
EPM5130GM883B2 Product Details

EPM5130GM883B2 Overview


There are 128 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.The device has 64 inputs and outputs.There are 100 terminations programmed into the device.As the terminal position of this electrical part is PERPENDICULAR, it serves as an important access point for passengers or freight.Power is supplied by a voltage of 5V volts.It is programmed with 100 pins.The device can also be used to find LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK.In order for the device to operate, it requires 5V power supplies.Vsup reaches 5.5V as the maximum supply voltage.A total of 19dedicated inputs are available for the purpose of detecting input signals.A supply voltage (Vsup) of greater than 4.5V should be used.The clock frequency of the device should not exceed 40MHz.Programmable logic types can be divided into UV PLD.Keep the operating temperature below 125°C.Ideally, the operating temperature should be -55°C.

EPM5130GM883B2 Features


64 I/Os
100 pin count
5V power supplies


EPM5130GM883B2 Applications


There are a lot of Altera
EPM5130GM883B2 CPLDs applications.


  • Interface bridging
  • I/O expansion
  • Discrete logic functions
  • Bootloaders for FPGAs
  • Address decoders
  • Custom state machines
  • Digital systems
  • Portable digital devices
  • Handheld digital devices
  • Battery operated portable devices

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