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CMLDM7002AJ TR

CMLDM7002AJ TR

CMLDM7002AJ TR

Central Semiconductor

CMLDM7002AJ TR datasheet pdf and Transistors - FETs, MOSFETs - Arrays product details from Central Semiconductor stock available on our website

SOT-23

CMLDM7002AJ TR Datasheet

non-compliant

In-Stock: 0 items
Specifications
Name Value
Type Parameter
Surface Mount YES
Number of Terminals 6
Transistor Element Material SILICON
JESD-609 Code e3
Pbfree Code icon-pbfree yes
Moisture Sensitivity Level (MSL) 1 (Unlimited)
ECCN Code EAR99
Terminal Finish MATTE TIN (315)
Subcategory FET General Purpose Power
Terminal Position DUAL
Terminal Form FLAT
Peak Reflow Temperature (Cel) 260
Reach Compliance Code compliant
Time@Peak Reflow Temperature-Max (s) 10
JESD-30 Code R-PDSO-F6
Operating Temperature (Max) 150°C
Number of Elements 2
Configuration SEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE
Operating Mode ENHANCEMENT MODE
Transistor Application AMPLIFIER
Polarity/Channel Type N-CHANNEL
Drain Current-Max (Abs) (ID) 0.28A
Drain-source On Resistance-Max 2Ohm
DS Breakdown Voltage-Min 60V
FET Technology METAL-OXIDE SEMICONDUCTOR
Power Dissipation-Max (Abs) 0.35W
Feedback Cap-Max (Crss) 5 pF
RoHS Status RoHS Compliant

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