896 Terminations 0°C~85°C TJ 5ASXMB3 System On Chip Arria V SX Series MCU - 208, FPGA - 250 I/O 1.1V
SOT-23
5ASXMB3E4F31C5N Datasheet
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Specifications
Name
Value
Type
Parameter
Factory Lead Time
8 Weeks
Package / Case
896-BBGA, FCBGA
Surface Mount
YES
Operating Temperature
0°C~85°C TJ
Packaging
Tray
Series
Arria V SX
JESD-609 Code
e1
Part Status
Active
Moisture Sensitivity Level (MSL)
3 (168 Hours)
Number of Terminations
896
Terminal Finish
TIN SILVER COPPER
HTS Code
8542.39.00.01
Terminal Position
BOTTOM
Terminal Form
BALL
Peak Reflow Temperature (Cel)
NOT SPECIFIED
Supply Voltage
1.1V
Terminal Pitch
1mm
Time@Peak Reflow Temperature-Max (s)
NOT SPECIFIED
Base Part Number
5ASXMB3
JESD-30 Code
S-PBGA-B896
Supply Voltage-Max (Vsup)
1.13V
Supply Voltage-Min (Vsup)
1.07V
Number of I/O
MCU - 208, FPGA - 250
Speed
800MHz
RAM Size
64KB
Core Processor
Dual ARM® Cortex®-A9 MPCore™ with CoreSight™
Peripherals
DMA, POR, WDT
Clock Frequency
622MHz
Connectivity
EBI/EMI, Ethernet, I2C, MMC/SD/SDIO, SPI, UART/USART, USB OTG
Architecture
MCU, FPGA
Programmable Logic Type
FIELD PROGRAMMABLE GATE ARRAY
Primary Attributes
FPGA - 350K Logic Elements
Length
31mm
Height Seated (Max)
2.7mm
Width
31mm
RoHS Status
RoHS Compliant
Pricing & Ordering
Quantity
Unit Price
Ext. Price
27
$1,721.89556
$27
5ASXMB3E4F31C5N Product Details
This SoC is built on Dual ARM® Cortex®-A9 MPCore™ with CoreSight™ core processor(s).
Based on the core processor(s) Dual ARM® Cortex®-A9 MPCore™ with CoreSight™, this SoC is built.Package 896-BBGA, FCBGA is assigned to this system on a chip by the manufacturer.The SoC chip provides users with reliable performance because it is implemented with 64KB RAM.This SoC design employs the MCU, FPGA technique for its internal architecture.The system on a chip is part of the series Arria V SX.This SoC meaning should have an average operating temperature of 0°C~85°C TJ.It is important to note that this SoC security combines FPGA - 350K Logic Elements.A state-of-the-art Tray package houses this SoC system on a chip.MCU - 208, FPGA - 250 I/Os are included in this SoC part.A 1.1V power supply is recommended.The SoCs wireless is considered unreliable if the voltage exceeds 1.13V.At least 1.07V can be supplied as a power source.The FIELD PROGRAMMABLE GATE ARRAY can be reconfigured to meet a variety of design requirements.In total, there are 896 terminations, which makes system on a chip possible.Search 5ASXMB3 for system on chips with similar specs and purposes.A 622MHz clock frequency is used by this SoC.
Dual ARM® Cortex®-A9 MPCore™ with CoreSight™ processor.
64KB RAM. Built on MCU, FPGA. Clock Frequency: 622MHz
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