0.4mm PMIC MAX® V Series 5M40Z 1.8V 64-TQFP Exposed Pad
SOT-23
5M40ZE64C4N Datasheet
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Specifications
Name
Value
Type
Parameter
Factory Lead Time
8 Weeks
Mounting Type
Surface Mount
Package / Case
64-TQFP Exposed Pad
Surface Mount
YES
Operating Temperature
0°C~85°C TJ
Packaging
Tray
Series
MAX® V
Published
2003
JESD-609 Code
e3
Part Status
Active
Moisture Sensitivity Level (MSL)
3 (168 Hours)
Number of Terminations
64
ECCN Code
EAR99
Terminal Finish
MATTE TIN
Terminal Position
QUAD
Terminal Form
GULL WING
Peak Reflow Temperature (Cel)
NOT SPECIFIED
Supply Voltage
1.8V
Terminal Pitch
0.4mm
Time@Peak Reflow Temperature-Max (s)
NOT SPECIFIED
Base Part Number
5M40Z
JESD-30 Code
S-PQFP-G64
Qualification Status
Not Qualified
Supply Voltage-Max (Vsup)
1.89V
Supply Voltage-Min (Vsup)
1.71V
Programmable Type
In System Programmable
Number of I/O
54
Clock Frequency
184.1MHz
Propagation Delay
7.9 ns
Output Function
MACROCELL
Number of Macro Cells
32
Voltage Supply - Internal
1.71V~1.89V
Delay Time tpd(1) Max
7.5ns
Number of Logic Elements/Blocks
40
Length
7mm
Height Seated (Max)
1.2mm
Width
7mm
RoHS Status
RoHS Compliant
Pricing & Ordering
Quantity
Unit Price
Ext. Price
1
$1.20000
$1.2
5M40ZE64C4N Product Details
5M40ZE64C4N Overview
There are 32 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).There is a 64-TQFP Exposed Pad package containing it.The device has 54inputs and outputs.Devices are programmed with terminations of [0].QUADis the terminal position of this electrical part.An electrical supply voltage of 1.8V is used to power it.It is recommended to package the chip by Tray.During operation, the operating temperature is kept at 0°C~85°C TJ to ensure its reliability.It is recommended to mount the chip by Surface Mount.The MAX? Vseries comprises this type of FPGA.The 5M40Zshows its related parts.There are 40 logic elements/blocks.There is a maximum supply voltage (Vsup) of 1.89V.There should be a higher supply voltage (Vsup) than 1.71V.It should not exceed 184.1MHzin terms of clockfrequency.
5M40ZE64C4N Features
64-TQFP Exposed Pad package 54 I/Os The operating temperature of 0°C~85°C TJ
5M40ZE64C4N Applications
There are a lot of Intel 5M40ZE64C4N CPLDs applications.
Digital multiplexers
I/O expansion
I/O PORTS (MCU MODULE)
Power Meter SMPS
Protection relays
Timing control
Page register
Voltage level translation
Custom state machines
Wireless Infrastructure Base Band Unit and Remote Radio Unit