3.3/55V 1.27mm PMIC MAX® 7000S Series EPM7064 5V 84-LCC (J-Lead)
SOT-23
EPM7064SLC84-6 Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Mounting Type
Surface Mount
Package / Case
84-LCC (J-Lead)
Surface Mount
YES
Operating Temperature
0°C~70°C TA
Packaging
Tray
Series
MAX® 7000S
JESD-609 Code
e0
Part Status
Obsolete
Moisture Sensitivity Level (MSL)
3 (168 Hours)
Number of Terminations
84
Terminal Finish
Tin/Lead (Sn/Pb)
Additional Feature
CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
Subcategory
Programmable Logic Devices
Technology
CMOS
Terminal Position
QUAD
Terminal Form
J BEND
Peak Reflow Temperature (Cel)
220
Supply Voltage
5V
Terminal Pitch
1.27mm
Time@Peak Reflow Temperature-Max (s)
30
Base Part Number
EPM7064
Qualification Status
Not Qualified
Supply Voltage-Max (Vsup)
5.25V
Power Supplies
3.3/55V
Programmable Type
In System Programmable
Number of I/O
68
Clock Frequency
200MHz
Propagation Delay
6 ns
Number of Gates
1250
Output Function
MACROCELL
Number of Macro Cells
64
JTAG BST
YES
Voltage Supply - Internal
4.75V~5.25V
Delay Time tpd(1) Max
6ns
Number of Logic Elements/Blocks
4
Length
29.3116mm
Height Seated (Max)
5.08mm
Width
29.3116mm
RoHS Status
Non-RoHS Compliant
EPM7064SLC84-6 Product Details
EPM7064SLC84-6 Overview
64 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.The item is enclosed in a 84-LCC (J-Lead) package.The device is programmed with 68 I/O ports.It is programmed to terminate devices at 84.There is a QUAD terminal position on the electrical part in question.The device is powered by a voltage of 5V volts.It is a part of the family Programmable Logic Devices.It is recommended that the chip be packaged by Tray.Ensure its reliability by operating at 0°C~70°C TA.It is recommended to mount the chip by Surface Mount.FPGAs belonging to the MAX® 7000S series contain this type of chip.When using this device, CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V is also available.You can find its related parts in the EPM7064.1250 gates are used to construct digital circuits.4 logic elements/blocks exist.A power supply of 3.3/55V volts is required to operate this device.Initially, the maximum supply voltage (Vsup) is 5.25V.The clock frequency of this device should not exceed 200MHz.
EPM7064SLC84-6 Features
84-LCC (J-Lead) package 68 I/Os The operating temperature of 0°C~70°C TA 3.3/55V power supplies
EPM7064SLC84-6 Applications
There are a lot of Intel EPM7064SLC84-6 CPLDs applications.