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EPM9560RC240-15YY

EPM9560RC240-15YY

EPM9560RC240-15YY

Intel

PMIC MAX? 9000 Series EPM9560 240-BFQFP Exposed Pad

SOT-23

EPM9560RC240-15YY Datasheet

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In-Stock: 0 items
Specifications
Name Value
Type Parameter
Mounting Type Surface Mount
Package / Case 240-BFQFP Exposed Pad
Supplier Device Package 240-RQFP (32x32)
Operating Temperature 0°C~70°C TA
Packaging Tray
Series MAX® 9000
Part Status Obsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Base Part Number EPM9560
Programmable Type In System Programmable
Number of I/O 191
Number of Gates 12000
Number of Macro Cells 560
Voltage Supply - Internal 4.75V~5.25V
Delay Time tpd(1) Max 15ns
Number of Logic Elements/Blocks 35
Pricing & Ordering
Quantity Unit Price Ext. Price
1 $158.623440 $158.62344
10 $149.644755 $1496.44755
100 $141.174297 $14117.4297
500 $133.183299 $66591.6495
1000 $125.644622 $125644.622
EPM9560RC240-15YY Product Details

EPM9560RC240-15YY Overview


There are 560 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.It is embedded in the 240-BFQFP Exposed Pad package.As a result, it has 191 I/O ports programmed.Trayshould be used to package the chip.To ensure reliability, the device operates at a temperature of [0].There should be a Surface Mounton the chip.This type of FPGA is a part of the MAX? 9000 series.In accordance with the [0], its related parts are listed.As a building block for digital circuits, there are 12000gates.There are 35 logic elements/blocks, which are fundamental building blocks of field-programmable gate array (FPGA) technology.

EPM9560RC240-15YY Features


240-BFQFP Exposed Pad package
191 I/Os
The operating temperature of 0°C~70°C TA

EPM9560RC240-15YY Applications


There are a lot of Intel EPM9560RC240-15YY CPLDs applications.

  • USB Bus
  • Handheld digital devices
  • Parity generators
  • Reset swapping
  • D/T registers and latches
  • Pattern recognition
  • PLC analog input modules
  • Custom shift registers
  • SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
  • Voltage level translation

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