CY37256VP160-100AXI

Name	Value
Type	Parameter
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	160-LQFP
Number of Pins	160
Operating Temperature	-40°C~85°C TA
Packaging	Tray
Published	2003
Series	Ultra37000™
JESD-609 Code	e3
Part Status	Obsolete
Moisture Sensitivity Level (MSL)	3 (168 Hours)
Number of Terminations	160
Terminal Finish	Matte Tin (Sn)
Additional Feature	YES
HTS Code	8542.39.00.01
Subcategory	Programmable Logic Devices
Terminal Position	QUAD
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	3.3V
Terminal Pitch	0.5mm
Frequency	100MHz
Time@Peak Reflow Temperature-Max (s)	20
Base Part Number	CY37256
Pin Count	160
Operating Supply Voltage	3.3V
Programmable Type	In-System Reprogrammable™ (ISR™) CMOS
Max Supply Voltage	3.6V
Min Supply Voltage	3V
Number of I/O	133
Memory Type	EEPROM
Propagation Delay	12 ns
Turn On Delay Time	12 ns
Number of Gates	7700
Number of Logic Blocks (LABs)	16
Output Function	MACROCELL
Number of Macro Cells	256
JTAG BST	YES
Number of Dedicated Inputs	1
Voltage Supply - Internal	3V~3.6V
Height Seated (Max)	1.6mm
Length	24mm
Width	24mm
Radiation Hardening	No
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

Name

Value

Type

Parameter

Mount

Surface Mount

Mounting Type

Surface Mount

Package / Case

160-LQFP

Number of Pins

160

Operating Temperature

-40°C~85°C TA

Packaging

Tray

Published

2003

Series

Ultra37000™

JESD-609 Code

Part Status

Obsolete

Moisture Sensitivity Level (MSL)

3 (168 Hours)

Number of Terminations

160

Terminal Finish

Matte Tin (Sn)

Additional Feature

YES

HTS Code

8542.39.00.01

Subcategory

Programmable Logic Devices

Terminal Position

QUAD

Terminal Form

GULL WING

Peak Reflow Temperature (Cel)

260

Supply Voltage

3.3V

Terminal Pitch

0.5mm

Frequency

100MHz

Time@Peak Reflow Temperature-Max (s)

Base Part Number

CY37256

Pin Count

160

Operating Supply Voltage

3.3V

Programmable Type

In-System Reprogrammable™ (ISR™) CMOS

Max Supply Voltage

3.6V

Min Supply Voltage

Number of I/O

133

Memory Type

EEPROM

Propagation Delay

12 ns

Turn On Delay Time

12 ns

Number of Gates

7700

Number of Logic Blocks (LABs)

Output Function

MACROCELL

Number of Macro Cells

256

JTAG BST

YES

Number of Dedicated Inputs

Voltage Supply - Internal

3V~3.6V

Height Seated (Max)

1.6mm

Length

24mm

Width

24mm

Radiation Hardening

RoHS Status

ROHS3 Compliant

Lead Free

CY37256VP160-100AXI Overview

A mobile phone network consists of 256macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).160-LQFP is the package in which it resides.There are 133 I/Os programmed in it.The device is programmed with 160 terminations.As the terminal position of this electrical part is QUAD, it serves as an important access point for passengers and freight.Power is provided by a supply voltage of 3.3V volts.It is included in Programmable Logic Devices.As a result, it is packaged as Tray.To ensure its reliability, the operating temperature is set to -40°C~85°C TA.The chip should be mounted by Surface Mount.It belongs to the Ultra37000™series of FPGAs.The chip is programmed with 160 pins.When using this device, YES can also be found.The CY37256 indicates that its related parts can be found.7700 gates are devices that serve as building blocks for digital circuits.For high efficiency, the supply voltage should be maintained at 3.3V.In order to store data, EEPROM is used.The electronic part is mounted by Surface Mount.The device is designed with pins 160.This device operates at a voltage of 3.6Vas its maximum supply voltage.The minimal supply voltage is 3V.It is possible to achieve a frequency of 100MHz.It is composed of 16 logic blocks (LABs).It has 1 dedicated inputs for detecting input signals.

CY37256VP160-100AXI Features

160-LQFP package
133 I/Os
The operating temperature of -40°C~85°C TA
160 pin count
160 pins
16 logic blocks (LABs)

CY37256VP160-100AXI Applications

There are a lot of Cypress Semiconductor Corp
CY37256VP160-100AXI CPLDs applications.

Voltage level translation
Timing control
Interface bridging
I/O expansion
Discrete logic functions
Bootloaders for FPGAs
Address decoders
Custom state machines
Digital systems
Portable digital devices