74AUP1G08SE-7

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Manufacturer part number:74AUP1G08SE-7

Manufacturer:Diodes Incorporated

Description:6.2 ns ns Gates & Inverters Surface Mount Surface Mount 0.8V~3.6V V 500nA μA

Case Package:SOT-23

Datasheet:74AUP1G08SE-7 Datasheet

RoHs Status:non-compliant

Name	Value
Type	Parameter
Factory Lead Time	17 Weeks
Contact Plating	Tin
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	5-TSSOP, SC-70-5, SOT-353
Number of Pins	5
Operating Temperature	-40°C~125°C TA
Packaging	Tape & Reel (TR)
Series	74AUP
JESD-609 Code	e3
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	5
Voltage - Supply	0.8V~3.6V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Number of Functions	1
Supply Voltage	3V
Time@Peak Reflow Temperature-Max (s)	40
Pin Count	5
Number of Outputs	1
Supply Voltage-Max (Vsup)	3.6V
Supply Voltage-Min (Vsup)	0.8V
Propagation Delay	6.2 ns
Quiescent Current	500nA
Family	AUP/ULP/V
Logic Function	AND
Number of Inputs	2
Current - Output High, Low	4mA 4mA
Logic Type	AND Gate
Max Propagation Delay @ V, Max CL	6.2ns @ 3.3V, 30pF
Logic Level - Low	0.7V ~ 0.9V
Logic Level - High	1.6V ~ 2V
REACH SVHC	No SVHC
Radiation Hardening	No
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

Quantity	Unit Price	Ext. Price

74AUP1G08SE-7 Description

The advanced, ultra-low power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.

The 74AUP1G08 is a single, two-input, positive AND gate with a standard push-pull output designed for operation over a power supply range of 0.8V to 3.6V.

The device is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow

when the device is powered down.