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ICS854105AGLF

ICS854105AGLF

ICS854105AGLF

Integrated Device Technology (IDT)

1 Circuit 250MHz 3.3V Clock Buffer DUAL 16 Pins TSSOP

SOT-23

ICS854105AGLF Datasheet

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Specifications
Name Value
Type Parameter
Mount Surface Mount
Package / Case TSSOP
JESD-609 Code e3
Pbfree Code yes
Number of Terminations 16
ECCN Code EAR99
Terminal Finish MATTE TIN
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Number of Functions 1
Supply Voltage 3.3V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 16
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 3.465V
Temperature Grade COMMERCIAL
Number of Circuits 1
Frequency (Max) 250MHz
Output Characteristics 3-STATE
Input LVTTL
Logic IC Type LOW SKEW CLOCK DRIVER
Number of True Outputs 4
Number of Inverted Outputs 4
Length 5mm
Width 4.4mm
RoHS Status RoHS Compliant
ICS854105AGLF Product Details

ICS854105AGLF Overview


The clock divider is packaged in a TSSOP case. As a rule, the maximum value for normal operation is 250MHz. It contains 16 terminations. The supply voltage of 3.3V can be used to achieve high efficiency. It is located in the way of Surface Mount. It has a pin count of 16. In order to maintain reliability, it should be operated at a temperature no higher than 0°C. Having a maximum operating temperature of 70°C enables stable operation. A maximum supply voltage (Vsup) is set to 3.465V. With a LOW SKEW CLOCK DRIVER logic IC, it works. True outputs are available in 4.

ICS854105AGLF Features


16 terminations
logic IC type of LOW SKEW CLOCK DRIVER


ICS854105AGLF Applications


There are a lot of Integrated Device Technology (IDT)
ICS854105AGLF Clock Buffers & Drivers applications.


  • Aviation
  • Medical instruments
  • Furniture
  • Machine made
  • Clock signal duplication
  • Clock signal format conversion
  • Clock signal level shifting
  • High performance communication system
  • Data center
  • Cloud computing

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