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ISPLSI1032-80LJ

ISPLSI1032-80LJ

ISPLSI1032-80LJ

Lattice Semiconductor

5V 1.27mm PMIC 5V

SOT-23

ISPLSI1032-80LJ Datasheet

non-compliant

In-Stock: 0 items
Specifications
Name Value
Type Parameter
Surface Mount YES
JESD-609 Code e0
Pbfree Code no
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 84
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn85Pb15)
Additional Feature IN-SYSTEM PROGRAMMABLE; 4 EXTERNAL CLOCKS
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form J BEND
Peak Reflow Temperature (Cel) 225
Supply Voltage 5V
Terminal Pitch 1.27mm
Reach Compliance Code not_compliant
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 84
JESD-30 Code S-PQCC-J84
Qualification Status Not Qualified
Operating Temperature (Max) 70°C
Supply Voltage-Max (Vsup) 5.25V
Power Supplies 5V
Temperature Grade COMMERCIAL
Supply Voltage-Min (Vsup) 4.75V
Number of I/O 64
Clock Frequency 50MHz
Propagation Delay 20 ns
Organization 4 DEDICATED INPUTS, 64 I/O
Programmable Logic Type EE PLD
Number of Gates 6000
Output Function MACROCELL
Number of Macro Cells 128
JTAG BST NO
Number of Dedicated Inputs 4
In-System Programmable YES
Length 29.3116mm
Height Seated (Max) 4.57mm
Width 29.3116mm
RoHS Status Non-RoHS Compliant
ISPLSI1032-80LJ Product Details

ISPLSI1032-80LJ Overview


There are 128 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).It is programmed with 64 I/Os.There are 84 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.The terminal position of this electrical part is QUAD, which serves as an important access point for passengers or freight.It is powered from a supply voltage of 5V.This part is included in Programmable Logic Devices.It is equipped with 84 pin count.It is also characterized by IN-SYSTEM PROGRAMMABLE; 4 EXTERNAL CLOCKS.There are 6000 gates, which are devices that acts as a building block for digital circuits. It operates from 5V power supplies.The maximal supply voltage (Vsup) reaches 5.25V.There are 4 dedicated inputs used to detect the status of input signals.The supply voltage (Vsup) should be greater than 4.75V.Its clock frequency should not exceed 50MHz.This kind of FPGA is composed of EE PLD.The operating temperature should be kept below 70°C.

ISPLSI1032-80LJ Features


64 I/Os
84 pin count
5V power supplies


ISPLSI1032-80LJ Applications


There are a lot of Lattice Semiconductor
ISPLSI1032-80LJ CPLDs applications.


  • Power up sequencing
  • Voltage level translation
  • Timing control
  • Interface bridging
  • I/O expansion
  • Discrete logic functions
  • Bootloaders for FPGAs
  • Address decoders
  • Custom state machines
  • Digital systems

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