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ISPLSI 5512VE-100LF256

ISPLSI 5512VE-100LF256

ISPLSI 5512VE-100LF256

Lattice Semiconductor Corporation

2.5/3.33.3V 1mm PMIC ispLSI? 5000VE Series ISPLSI 5512 3.3V 256-BGA

SOT-23

ISPLSI 5512VE-100LF256 Datasheet

non-compliant

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Specifications
Name Value
Type Parameter
Mounting Type Surface Mount
Package / Case 256-BGA
Surface Mount YES
Operating Temperature 0°C~70°C TA
Packaging Tray
Published 2000
Series ispLSI® 5000VE
JESD-609 Code e0
Part Status Obsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 256
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn63Pb37)
Additional Feature YES
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Supply Voltage 3.3V
Terminal Pitch 1mm
Base Part Number ISPLSI 5512
Pin Count 256
JESD-30 Code S-PBGA-B256
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 3.6V
Power Supplies 2.5/3.33.3V
Supply Voltage-Min (Vsup) 3V
Programmable Type In System Programmable
Number of I/O 192
Clock Frequency 67MHz
Propagation Delay 10 ns
Number of Gates 24000
Output Function MACROCELL
Number of Macro Cells 512
JTAG BST YES
Voltage Supply - Internal 3V~3.6V
Delay Time tpd(1) Max 10ns
Number of Logic Elements/Blocks 16
Height Seated (Max) 2.1mm
Length 17mm
Width 17mm
RoHS Status Non-RoHS Compliant
ISPLSI 5512VE-100LF256 Product Details

ISPLSI 5512VE-100LF256 Overview


Currently, there are 512 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.It is part of the 256-BGA package.The device has 192inputs and outputs.Devices are programmed with terminations of [0].The terminal position of this electrical component is BOTTOM.An electrical supply voltage of 3.3V is used to power it.It is a part of family [0].It is recommended that the chip be packaged by Tray.During operation, the operating temperature is kept at 0°C~70°C TA to ensure its reliability.The chip should be mounted by Surface Mount.In terms of FPGAs, it belongs to the ispLSI? 5000VE series.A chip with 256pins is programmed.This device is also capable of displaying [0].You can find its related parts in the [0].The 24000gates serve as building blocks for digital circuits.16logic elements/blocks exist.Currently, it is powered by 2.5/3.33.3Vsources.3.6Vrepresents the maximal supply voltage (Vsup).A supply voltage (Vsup) of greater than 3V should be used.The clock frequency should not exceed 67MHz.

ISPLSI 5512VE-100LF256 Features


256-BGA package
192 I/Os
The operating temperature of 0°C~70°C TA
256 pin count
2.5/3.33.3V power supplies

ISPLSI 5512VE-100LF256 Applications


There are a lot of Lattice Semiconductor Corporation ISPLSI 5512VE-100LF256 CPLDs applications.

  • Parity generators
  • Power Meter SMPS
  • Boolean function generators
  • PULSE WIDTH MODULATION (PWM)
  • Dedicated input registers
  • Portable digital devices
  • Synchronous or asynchronous mode
  • Timing control
  • Digital multiplexers
  • USB Bus

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