MAX6760TATGD3+T Overview

This power management consists of 8 mounting terminals on which it can be mounted. This power ic is packaged in a way that looks like a Tape & Reel (TR). Please find attached 1 functions for your reference in this IC power. This power managment ic consists of 2 channels, each of which can be used independently. There are 8-WDFN Exposed Pad functions included in this PMIC so that you can refer to them. It is a IC power that shares many benefits with other products from the Multi-Voltage Supervisor line. As specified in the package specification, the peak reflow temperature of the package is set at 260. When a supply voltage of 3.6V is applied to the power ic, it conducts. When 2 is applied to the power ic, it conducts. By Surface Mount, IC management has been mounted. This power ic can be sub-categorized as Power Management Circuits. Taking into account all of the pins, this power management has a total of 8. The pins of the power management system count 8. Supply voltage (Vsup) should be at least 1V for this power management. There should be no more than 6V volts of maximum supply voltage (Vsup) in this power management. The recommended mounting type for IC management is Surface Mount. This power management is the recommended temperature range for the supervisors: -40°C~125°C TA. Power management has an output of Push-Pull, Totem Pole during operation. There is a 13μA supply current present in the power management. A similar IC managements number of the manufacturer can always be found by using MAX6760, the base power ics number.

MAX6760TATGD3+T Features

Multi-Voltage Supervisor type
Minimum supply voltage of 1V
13μA operating supply current

MAX6760TATGD3+T Applications

There are a lot of Maxim Integrated MAX6760TATGD3+T Voltage Supervisors applications.

• Utility meter
• Radio
• Detection of phase sequence
• DC stabilized power supply module
• Stable power system
• Power communication system
• Unattended substation automation
• Solar power charger
• Automotive permanent magnet synchronous motors
• FPGA design