256 Terminations -40°C~100°C TJ 256 Pin A2F500M3G System On Chip SmartFusion® Series MCU - 25, FPGA - 66 I/O 1.5V
SOT-23
A2F500M3G-FG256I Datasheet
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Specifications
Name
Value
Type
Parameter
Factory Lead Time
12 Weeks
Package / Case
256-LBGA
Surface Mount
YES
Number of Pins
256
Operating Temperature
-40°C~100°C TJ
Packaging
Tray
Series
SmartFusion®
Published
2015
JESD-609 Code
e0
Part Status
Active
Moisture Sensitivity Level (MSL)
3 (168 Hours)
Number of Terminations
256
Terminal Finish
Tin/Lead (Sn/Pb)
HTS Code
8542.39.00.01
Terminal Position
BOTTOM
Terminal Form
BALL
Peak Reflow Temperature (Cel)
225
Supply Voltage
1.5V
Terminal Pitch
1mm
Frequency
80MHz
Time@Peak Reflow Temperature-Max (s)
20
Base Part Number
A2F500M3G
Number of Outputs
66
Qualification Status
Not Qualified
Supply Voltage-Max (Vsup)
1.575V
Power Supplies
1.51.82.53.3V
Supply Voltage-Min (Vsup)
1.425V
Interface
EBI/EMI, Ethernet, I2C, SPI, UART, USART
Operating Supply Current
2mA
Number of I/O
MCU - 25, FPGA - 66
RAM Size
64KB
Core Processor
ARM® Cortex®-M3
Peripherals
DMA, POR, WDT
Connectivity
EBI/EMI, Ethernet, I2C, SPI, UART/USART
Architecture
MCU, FPGA
Programmable Logic Type
FIELD PROGRAMMABLE GATE ARRAY
Core Architecture
ARM
Number of Gates
500000
Number of Logic Blocks (LABs)
24
Primary Attributes
ProASIC®3 FPGA, 500K Gates, 11520 D-Flip-Flops
Flash Size
512KB
Length
17mm
Height Seated (Max)
1.7mm
Width
17mm
RoHS Status
Non-RoHS Compliant
A2F500M3G-FG256I Product Details
This SoC is built on ARM® Cortex®-M3 core processor(s).
ARM® Cortex®-M3 core processor(s) are used in the construction of this SoC.Manufacturer assigns package 256-LBGA to this system on a chip.Users will enjoy reliable performance with this SoC chip, which has implemented 64KB RAM.The internal architecture of this SoC design is based on the MCU, FPGA technique.In the SmartFusion® series, this system on chip SoC is included.Typical operating temperatures for this SoC meaning should be -40°C~100°C TJ.Taking note of the fact that this SoC security combines ProASIC®3 FPGA, 500K Gates, 11520 D-Flip-Flops is important.An advanced Tray package houses this SoC system on a chip.In total, this SoC part has MCU - 25, FPGA - 66 I/Os.Use a power supply with a voltage of 1.5V if possible.It is unsafe to operate the SoCs wireless at voltages above 1.575V.Power supplies of at least 1.425V are required.You can reconfigure FIELD PROGRAMMABLE GATE ARRAY to meet your specific design needs.A system on a chip benefits from having 256 terminations.A SoC chip like this can have 66 outputs.In order to operate system on chip, you will need 1.51.82.53.3V power supplies.A flashing 512KB appears on it.Searching A2F500M3G will bring up system on chips with similar specs and purposes.At 80MHz, the wireless SoC works.In this SoC meaning, ARM serves as the core architecture.The computer SoC is the 256-pin version.
ARM® Cortex®-M3 processor.
64KB RAM. Built on MCU, FPGA. 512KB extended flash. Core Architecture: ARM
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