208 Terminations -40°C~100°C TJ 208 Pin A2F500M3G System On Chip SmartFusion® Series MCU - 22, FPGA - 66 I/O 1.5V
SOT-23
A2F500M3G-PQ208I Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Factory Lead Time
12 Weeks
Package / Case
208-BFQFP
Surface Mount
YES
Number of Pins
208
Operating Temperature
-40°C~100°C TJ
Packaging
Tray
Series
SmartFusion®
Published
2013
JESD-609 Code
e0
Part Status
Obsolete
Moisture Sensitivity Level (MSL)
3 (168 Hours)
Number of Terminations
208
Terminal Finish
Tin/Lead (Sn/Pb)
HTS Code
8542.39.00.01
Terminal Position
QUAD
Terminal Form
GULL WING
Peak Reflow Temperature (Cel)
225
Supply Voltage
1.5V
Terminal Pitch
0.5mm
Frequency
80MHz
Time@Peak Reflow Temperature-Max (s)
20
Base Part Number
A2F500M3G
Number of Outputs
66
Qualification Status
Not Qualified
Supply Voltage-Max (Vsup)
1.575V
Power Supplies
1.51.82.53.3V
Supply Voltage-Min (Vsup)
1.425V
Interface
Ethernet, I2C, SPI, UART, USART
Number of I/O
MCU - 22, FPGA - 66
RAM Size
64KB
Core Processor
ARM® Cortex®-M3
Peripherals
DMA, POR, WDT
Connectivity
Ethernet, I2C, SPI, UART/USART
Architecture
MCU, FPGA
Organization
11520 CLBS, 500000 GATES
Programmable Logic Type
FIELD PROGRAMMABLE GATE ARRAY
Core Architecture
ARM
Number of Logic Blocks (LABs)
24
Primary Attributes
ProASIC®3 FPGA, 500K Gates, 11520 D-Flip-Flops
Number of Equivalent Gates
500000
Flash Size
512KB
Length
28mm
Height Seated (Max)
4.1mm
Width
28mm
RoHS Status
Non-RoHS Compliant
A2F500M3G-PQ208I Product Details
This SoC is built on ARM® Cortex®-M3 core processor(s).
Based on the core processor(s) ARM® Cortex®-M3, this SoC has been developed.The manufacturer assigns this system on a chip with a 208-BFQFP package as per the manufacturer's specifications.A SoC chip with 64KB RAM is provided for users to enjoy reliable performance.As far as its internal architecture is concerned, this SoC design employs the MCU, FPGA technique.It is part of the SmartFusion® series of system on a chips.It is recommended that this SoC meaning be operated at -40°C~100°C TJ on an average.As one of the most important things to note is that this SoC security combines ProASIC®3 FPGA, 500K Gates, 11520 D-Flip-Flops together.Tray package houses this SoC system on a chip.An integral part of this SoC consists of a total of MCU - 22, FPGA - 66 I/Os.For safe operation, it is advisable to utilize a power supply with 1.5V voltage.In the SoCs wireless, high voltages above 1.575V are considered dangerous and should not be used.In order to run it, it must be fed by at least 1.425V of power.It is possible to configure FIELD PROGRAMMABLE GATE ARRAY to meet specific needs during the design process.The system on a chip uses 208 terminations in total.In order for this SoC chip to work properly, you can have 66 outputs.This system on chip SoC requires 1.51.82.53.3V power supply at all.As for its flash size, it is 512KB.By searching A2F500M3G, you will find system on chips with similar specs and purposes.A wireless SoC that operates at a frequency of 80MHz is what the wireless SoC does.This SoC meaning utilizes a core architecture of ARM as its foundation.In this computer SoC, there are 208 pins.
ARM® Cortex®-M3 processor.
64KB RAM. Built on MCU, FPGA. 512KB extended flash. Core Architecture: ARM
There are a lot of Microsemi Corporation
A2F500M3G-PQ208I System On Chip (SoC) applications.