18 Bit Universal Bus Transceiver -40°C~85°C Universal Bus Functions 74ALVCH Series 0.5mm 3.3V 56-TFSOP (0.240, 6.10mm Width)
SOT-23
74ALVCH16601DGGY Datasheet
non-compliant
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Specifications
Name
Value
Type
Parameter
Factory Lead Time
8 Weeks
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
56-TFSOP (0.240, 6.10mm Width)
Operating Temperature
-40°C~85°C
Packaging
Tape & Reel (TR)
Series
74ALVCH
JESD-609 Code
e4
Part Status
Active
Moisture Sensitivity Level (MSL)
2 (1 Year)
Number of Terminations
56
Terminal Finish
NICKEL PALLADIUM GOLD
Additional Feature
WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; WITH CLOCK ENABLE
Voltage - Supply
2.3V~3.6V
Terminal Position
DUAL
Terminal Form
GULL WING
Number of Functions
1
Supply Voltage
3.3V
Terminal Pitch
0.5mm
Pin Count
56
JESD-30 Code
R-PDSO-G56
Supply Voltage-Max (Vsup)
3.6V
Supply Voltage-Min (Vsup)
1.2V
Number of Circuits
18-Bit
Number of Ports
2
Number of Bits
18
Family
ALVC/VCX/A
Logic Function
Transceiver
Output Characteristics
3-STATE
Current - Output High, Low
24mA 24mA
Logic Type
Universal Bus Transceiver
Output Polarity
TRUE
Propagation Delay (tpd)
6 ns
Length
14mm
Height Seated (Max)
1.2mm
Width
6.1mm
RoHS Status
ROHS3 Compliant
Pricing & Ordering
Quantity
Unit Price
Ext. Price
2,000
$0.69300
$1.386
74ALVCH16601DGGY Product Details
74ALVCH16601DGGY Overview
56-TFSOP (0.240, 6.10mm Width) contains this file. Tape & Reel (TR) is how it's packaged. Flexible 18-Bit circuits are used to achieve its superior performance. A Universal Bus Transceiver logic type is used in this electrical device. In this case, the electronic part is mounted in the direction of Surface Mount. Over -40°C~85°C, the operating temperature should be higher. High/Low output currents allow 24mA 24mA to have a maximum design flexibility. As part of the 74ALVCH series, it is a type of FPGA. Powered by 2.3V~3.6V, it operates on a voltage of V. The 56 termination is a practice in which a transmission line is terminated with an impedance matching device at the end of the line in order to match the characteristic impedance of the line. Normal operation requires an output voltage above 3.3V. 56 pins are present in the device. It is designed with 18 Bits. It is possible to terminate a transmission line with a device that matches the line's characteristic impedance, known as 2 terminations. The electronic part is mounted in Surface Mount-direction. In the family of ALVC/VCX/A devices, this electronic device belongs. It reaches 3.6V when the maximum supply voltage (Vsup) is reached. There should be a greater supply voltage (Vsup) than 1.2V. In addition to this, WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; WITH CLOCK ENABLE is another characteristic of it.
74ALVCH16601DGGY Features
56-TFSOP (0.240, 6.10mm Width) package 74ALVCH series 56 pin count
74ALVCH16601DGGY Applications
There are a lot of Nexperia USA Inc. 74ALVCH16601DGGY Universal Bus Functions applications.