0.8V~3.6V 309MHz 1 Bit D-Type Flip Flop DUAL 74AUP1G374 6 Pins 74AUP Series 6-XFDFN
SOT-23
74AUP1G374GS,132 Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Factory Lead Time
13 Weeks
Contact Plating
Tin
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
6-XFDFN
Number of Pins
6
Operating Temperature
-40°C~125°C TA
Packaging
Tape & Reel (TR)
Series
74AUP
JESD-609 Code
e3
Part Status
Active
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Number of Terminations
6
Type
D-Type
Technology
CMOS
Voltage - Supply
0.8V~3.6V
Terminal Position
DUAL
Supply Voltage
1.1V
Terminal Pitch
0.35mm
Base Part Number
74AUP1G374
Function
Standard
Output Type
Tri-State, Non-Inverted
Number of Elements
1
Polarity
Non-Inverting
Supply Voltage-Min (Vsup)
0.8V
Number of Bits
1
Clock Frequency
309MHz
Propagation Delay
21.6 ns
Quiescent Current
500nA
Turn On Delay Time
23.6 ns
Family
AUP/ULP/V
Output Characteristics
3-STATE
Current - Output High, Low
4mA 4mA
Max Propagation Delay @ V, Max CL
5.8ns @ 3.3V, 30pF
Trigger Type
Positive Edge
Input Capacitance
0.8pF
Clock Edge Trigger Type
Positive Edge
Height Seated (Max)
0.35mm
Radiation Hardening
No
RoHS Status
ROHS3 Compliant
Lead Free
Lead Free
Pricing & Ordering
Quantity
Unit Price
Ext. Price
5,000
$0.21033
$1.05165
74AUP1G374GS,132 Product Details
74AUP1G374GS,132 Overview
It is embeded in 6-XFDFN case. Package Tape & Reel (TR)embeds it. Tri-State, Non-Invertedis the output configured for it. It is configured with a trigger that uses Positive Edge. There is an electronic component mounted in the way of Surface Mount. A 0.8V~3.6Vsupply voltage is required for it to operate. Currently, the operating temperature is -40°C~125°C TA. A flip flop of this type is classified as a D-Type. FPGAs belonging to the 74AUPseries contain this type of chip. Its output frequency should not exceed 309MHz. D latch consists of 1 elements. Currently, there are 6 terminations. The 74AUP1G374family includes it. It is powered from a supply voltage of 1.1V. Its input capacitance is 0.8pFfarads. The electronic device belongs to the AUP/ULP/Vfamily. Electronic part Surface Mountis mounted in the way. The electronic flip flop is designed with pins 6. The clock edge trigger type for this device is Positive Edge. 1bits are used in its design. It is imperative that the supply voltage (Vsup) is maintained above 0.8Vin order to ensure normal operation. There is 500nA quiescent current consumption by it.