0.8V~3.6V 309MHz 1 Bit D-Type Flip Flop DUAL 74AUP1G374 6 Pins 500nA 74AUP Series 5-TSSOP, SC-70-5, SOT-353
SOT-23
74AUP1G374GW-Q100H Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Factory Lead Time
4 Weeks
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
5-TSSOP, SC-70-5, SOT-353
Number of Pins
6
Operating Temperature
-40°C~125°C TA
Packaging
Tape & Reel (TR)
Series
74AUP
Part Status
Active
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Number of Terminations
6
Type
D-Type
Technology
CMOS
Voltage - Supply
0.8V~3.6V
Terminal Position
DUAL
Terminal Form
GULL WING
Supply Voltage
1.1V
Base Part Number
74AUP1G374
Function
Standard
Output Type
Tri-State, Non-Inverted
Number of Elements
1
Polarity
Non-Inverting
Supply Voltage-Min (Vsup)
0.8V
Number of Bits
1
Clock Frequency
309MHz
Propagation Delay
21.6 ns
Family
AUP/ULP/V
Current - Quiescent (Iq)
500nA
Output Characteristics
3-STATE
Current - Output High, Low
4mA 4mA
Max Propagation Delay @ V, Max CL
5.8ns @ 3.3V, 30pF
Trigger Type
Positive Edge
Input Capacitance
0.8pF
Clock Edge Trigger Type
Positive Edge
Length
2mm
Radiation Hardening
No
RoHS Status
ROHS3 Compliant
Pricing & Ordering
Quantity
Unit Price
Ext. Price
74AUP1G374GW-Q100H Product Details
74AUP1G374GW-Q100H Overview
5-TSSOP, SC-70-5, SOT-353is the way it is packaged. The package Tape & Reel (TR)contains it. T flip flop uses Tri-State, Non-Invertedas its output configuration. It is configured with a trigger that uses a value of Positive Edge. Surface Mountis occupied by this electronic component. A supply voltage of 0.8V~3.6V is required for operation. A temperature of -40°C~125°C TAis used in the operation. This electronic flip flop is of type D-Type. The FPGA belongs to the 74AUP series. Its output frequency should not exceed 309MHz Hz. D latch consists of 1 elements. It consumes 500nA of quiescent current without being affected by external factors. There have been 6 terminations. D latch belongs to the 74AUP1G374 family. The power source is powered by 1.1V. A 0.8pFfarad input capacitance is provided by this T flip flop. AUP/ULP/Vis the family of this D flip flop. A part of the electronic system is mounted in the way of Surface Mount. The 6pins are designed into the board. This device has Positive Edgeas its clock edge trigger type. Flip flops designed with 1bits are used in this part. Normal operation requires a supply voltage (Vsup) above 0.8V.