74AUP2G80GN,115 Overview

The flip flop is packaged in a case of 8-XFDFN. The Tape & Reel (TR)package contains it. There is a Invertedoutput configured with it. It is configured with the trigger Positive Edge. Surface Mountis in the way of this electric part. A 0.8V~3.6Vsupply voltage is required for it to operate. It is operating at a temperature of -40°C~125°C TA. The type of this D latch is D-Type. FPGAs belonging to the 74AUPseries contain this type of chip. It should not exceed 309MHzin terms of its output frequency. The element count is 2 . It has been determined that there have been 8 terminations. This D latch belongs to the family of 74AUP2G80. An input voltage of 1.1Vpowers the D latch. Input capacitance of this device is 0.6pF farads. Devices in the AUP/ULP/Vfamily are electronic devices. There is an electronic component mounted in the way of Surface Mount. Basically, it is designed with a set of 8 pins. This device has the clock edge trigger type of Positive Edge. As soon as Vsup reaches 3.6V, the maximum supply voltage is reached. Despite external influences, it consumes 500nAof quiescent current.

74AUP2G80GN,115 Features

Tape & Reel (TR) package
74AUP series
8 pins

74AUP2G80GN,115 Applications

There are a lot of Nexperia USA Inc. 74AUP2G80GN,115 Flip Flops applications.

• Circuit Design
• Power down protection
• Memory
• High Performance Logic for test systems
• Guaranteed simultaneous switching noise level
• Balanced 24 mA output drivers
• CMOS Process
• ESD protection
• Digital electronics systems
• Supports Live Insertion