LPC54114J256BD64QL Description
The LPC5411x are ARM Cortex-M4 based microcontrollers for embedded applications. These devices include an ARM Cortex-M0+ coprocessor, up to 192 KB of on-chip SRAM, up to 256 KB on-chip flash, full-speed USB device interface with Crystal-less operation, a DMIC subsystem with PDM microphone interface and I2S, five general-purpose timers, one SCTimer/PWM, one RTC/alarm timer, one 24-bit Multi-Rate Timer (MRT), a Windowed Watchdog Timer (WWDT), eight flexible serial communication peripherals (each of which can be a USART, SPI, or I2C interface), and one 12-bit 5.0 Msamples/sec ADC, and a temperature sensor. The ARM Cortex-M4 is a 32-bit core that offers system enhancements such as low power consumption, enhanced debug features, and a high level of support block integration. The ARM Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals, and includes an internal prefetch unit that supports speculative branching. The ARM Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A hardware floating-point unit is integrated in the core.
LPC54114J256BD64QL Features
Dual processor cores: ARM Cortex-M4 and ARM Cortex-M0+. Both cores operate up
to a maximum frequency of 150 MHz.
ARM Cortex-M4 core (version r0p1):
ARM Cortex-M4 processor, running at a frequency of up to 150 MHz.
Floating Point Unit (FPU) and Memory Protection Unit (MPU).
ARM Cortex-M4 built-in Nested Vectored Interrupt Controller (NVIC).
Non-maskable Interrupt (NMI) input with a selection of sources.
Serial Wire Debug (SWD) with six instruction breakpoints, two literal comparators,
and four watch points. Includes Serial Wire Output for enhanced debug
capabilities.
System tick timer.
ARM Cortex-M0+ core
ARM Cortex-M0+ processor, running at a frequency of up to 150 MHz (uses the
same clock as Cortex-M4) with a single-cycle multiplier and a fast single-cycle I/O
port.
ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC).
Non-maskable Interrupt (NMI) input with a selection of sources.
Serial Wire Debug with four breakpoints and two watch points.
System tick timer.
On-chip memory:
Up to 256 KB on-chip flash program memory with flash accelerator and 256 byte
page erase and write.
Up to 192 KB total SRAM consisting of 160 KB contiguous main SRAM and an
additional 32 KB SRAM on the I&D buses.
ROM API support:
Flash In-Application Programming (IAP) and In-System Programming (ISP).
ROM-based USB drivers (HID, CDC, MSC, and DFU). Flash updates via USB is
supported.
Supports booting from valid user code in flash, USART, SPI, and I2C.
Legacy, Single, and Dual image boot.
Serial interfaces:
Flexcomm Interface contains eight serial peripherals. Each can be selected by
software to be a USART, SPI, or I2C interface. Two Flexcomm Interfaces also
include an I2S interface. Each Flexcomm Interface includes a FIFO that supports
USART, SPI, and I2S if supported by that Flexcomm Interface. A variety of clocking
options are available to each Flexcomm Interface and include a shared fractional
baud-rate generator.
2C-bus interfaces support Fast-mode and Fast-mode Plus with data rates of up to
1Mbit/s and with multiple address recognition and monitor mode. Two sets of true
2C pads also support high speed mode (3.4 Mbit/s) as a slave.
USB 2.0 full-speed device controller with on-chip PHY and dedicated DMA
controller supporting crystal-less operation in device mode using software library.
See Technical note TN00031 for more details.
LPC54114J256BD64QL Applications
? Printers, and scanners
? Alarm systems, video intercom, and HVAC
? Home audio appliances