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LPC822M101JHI33Y

LPC822M101JHI33Y

LPC822M101JHI33Y

NXP USA Inc.

16KB 16K x 8 FLASH ARM® Cortex®-M0+ 32-Bit Microcontroller LPC82x Series 32-VFQFN Exposed Pad

SOT-23

LPC822M101JHI33Y Datasheet

non-compliant

In-Stock: 0 items
Specifications
Name Value
Type Parameter
Factory Lead Time 12 Weeks
Mounting Type Surface Mount
Package / Case 32-VFQFN Exposed Pad
Operating Temperature -40°C~105°C TA
Packaging Tape & Reel (TR)
Series LPC82x
Published 2010
Part Status Active
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Oscillator Type Internal
Number of I/O 29
Speed 30MHz
RAM Size 4K x 8
Voltage - Supply (Vcc/Vdd) 1.8V~3.6V
Core Processor ARM® Cortex®-M0+
Peripherals Brown-out Detect/Reset, DMA, POR, PWM, WDT
Program Memory Type FLASH
Core Size 32-Bit
Program Memory Size 16KB 16K x 8
Connectivity I2C, SPI, UART/USART
Data Converter A/D 12x12b
RoHS Status ROHS3 Compliant
Pricing & Ordering
Quantity Unit Price Ext. Price
6,000 $0.69426 $4.16556
LPC822M101JHI33Y Product Details

LPC822M101JHI33Y              Description

 

  LPC82x is a low-cost 32-bit MCU series based on ARM Cortex-M0+, with CPU frequencies up to 30 MHz. LPC82x supports up to 32 KB of flash memory and 8 KB of SRAM. LPC82x peripherals include a CRC engine, four I2C bus interfaces, up to three USART, up to two SPI interfaces, a multi-rate timer, self-wake timer and state configurable timer with PWM function (SCTimer/PWM), an DMA, a 12-bit ADC and an analog comparator, an Ihand O port configurable through a switch matrix, an input pattern matching engine, and up to 29 universal Ihand O pins.

 


LPC822M101JHI33Y                      Features

System:

 ARM Cortex-M0+ processor (revision r0p1), running at frequencies of up to

30 MHz with single-cycle multiplier and fast single-cycle I/O port.

 ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC).

 System tick timer.

 AHB multilayer matrix.

 Serial Wire Debug (SWD) with four break points and two watch points. JTAG

boundary scan (BSDL) supported.

MTB

 Memory:

Up to 32 KB on-chip flash programming memory with 64 Byte page write and

erase. Code Read Protection (CRP) supported.

8 KB SRAM.

 ROM API support:

 Boot loader.

 On-chip ROM APIs for ADC, SPI, I2C, USART, power configuration (power

profiles) and integer divide.

 Flash In-Application Programming (IAP) and In-System Programming (ISP).

 Digital peripherals:

 High-speed GPIO interface connected to the ARM Cortex-M0+ IO bus with up to 29

General-Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors,

programmable open-drain mode, input inverter, and digital filter. GPIO direction

control supports independent set/clear/toggle of individual bits.

High-current source output driver (20 mA) on four pins.

 


LPC822M101JHI33Y                 Applications


Sensor gateways Industrial

Gaming controllers8/16-bit applications Consumer

Climate control


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