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MC705P6AMDWE

MC705P6AMDWE

MC705P6AMDWE

NXP USA Inc.

4.5KB 4.5K x 8 OTP 8-Bit Microcontroller HC05 Series MC705P6 28-SOIC (0.295, 7.50mm Width)

SOT-23

MC705P6AMDWE Datasheet

non-compliant

In-Stock: 0 items
Specifications
Name Value
Type Parameter
Mounting Type Surface Mount
Package / Case 28-SOIC (0.295, 7.50mm Width)
Operating Temperature -40°C~125°C TA
Packaging Tube
Series HC05
Published 2005
Part Status Not For New Designs
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Base Part Number MC705P6
Oscillator Type Internal
Number of I/O 21
Speed 2.1MHz
RAM Size 176 x 8
Voltage - Supply (Vcc/Vdd) 3V~5.5V
uPs/uCs/Peripheral ICs Type MICROCONTROLLER
Peripherals POR, WDT
Program Memory Type OTP
Core Size 8-Bit
Program Memory Size 4.5KB 4.5K x 8
Connectivity SIO
Data Converter A/D 4x8b
RoHS Status ROHS3 Compliant
Pricing & Ordering
Quantity Unit Price Ext. Price
26 $7.46192 $194.00992
MC705P6AMDWE Product Details

MC705P6AMDWE Description


The microcontroller MC68HC05P6 has an EPROM variant called the MC705P6AMDWE. A 4-channel, 8-bit analog-to-digital (A/D) converter, a 16-bit timer with output compare and input capture, a serial communications port (SIOP), and a computer operating properly (COP) watchdog timer make up this low-cost assembly. The M68HC05 CPU core has 21 input/output (I/O) pins (20 bidirectional, 1 input-only), 176 bytes of RAM, 4672 bytes of user EPROM, and 239 bytes of bootloader ROM. The 28-pin plastic dual in-line (PDIP) or 28-pin small outline integrated circuit (SOIC) packages are both available for this component.



MC705P6AMDWE Features


  • 16-bit timer with output compare and input capture

  • 20 bidirectional I/O lines and 1 input-only line

  • PC0 and PC1 high-current outputs

  • Single-chip, bootloader, and test modes

  • Power-saving stop, halt, and wait modes

  • Static EPROM mask option register (MOR) selectable options:

– COP watchdog timer enable or disable

– Edge-sensitive or edge- and level-sensitive external interrupt

– SIOP most significant bit (MSB) or least significant bit (LSB) first

– SIOP clock rates: OSC divided by 8, 16, 32, or 64

– Stop instruction mode, STOP or HALT

– EPROM security external lockout

– Programmable keyscan (pullups/interrupts) on PA0–PA7

  • Low cost

  • M68HC05 core

  • 28-pin SOIC, PDIP, or windowed DIP package

  • 4672 bytes of user EPROM (including 48 bytes of page zero EPROM and 16 bytes of user vectors)

  • 239 bytes of bootloader ROM

  • 176 bytes of on-chip RAM

  • 4-channel 8-bit A/D converter

  • SIOP serial communications port



MC705P6AMDWE Applications


  • Automobile engine control systems

  • Implantable medical devices

  • Remote controls

  • Office machines

  • Appliances


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