128KB 128K x 8 FLASH 8-Bit Microcontroller S08 Series MC9S08AC128 5V 44-LQFP
SOT-23
MC9S08AC128CFGE Datasheet
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Specifications
Name
Value
Type
Parameter
Factory Lead Time
10 Weeks
Mounting Type
Surface Mount
Package / Case
44-LQFP
Surface Mount
YES
Operating Temperature
-40°C~85°C TA
Packaging
Tray
Series
S08
Published
2006
JESD-609 Code
e3
Part Status
Active
Moisture Sensitivity Level (MSL)
3 (168 Hours)
Number of Terminations
44
ECCN Code
3A991.A.2
Terminal Finish
Matte Tin (Sn)
HTS Code
8542.31.00.01
Terminal Position
QUAD
Terminal Form
GULL WING
Peak Reflow Temperature (Cel)
260
Supply Voltage
5V
Terminal Pitch
0.8mm
Time@Peak Reflow Temperature-Max (s)
40
Base Part Number
MC9S08AC128
JESD-30 Code
S-PQFP-G44
Qualification Status
Not Qualified
Supply Voltage-Max (Vsup)
5.5V
Power Supplies
3/5V
Supply Voltage-Min (Vsup)
2.7V
Oscillator Type
Internal
Number of I/O
38
Speed
40MHz
RAM Size
8K x 8
Voltage - Supply (Vcc/Vdd)
2.7V~5.5V
uPs/uCs/Peripheral ICs Type
MICROCONTROLLER
Peripherals
LVD, POR, PWM, WDT
Clock Frequency
40MHz
Program Memory Type
FLASH
Core Size
8-Bit
Program Memory Size
128KB 128K x 8
Connectivity
I2C, LINbus, SCI, SPI
Bit Size
8
Data Converter
A/D 8x10b
Has ADC
YES
DMA Channels
NO
PWM Channels
YES
DAC Channels
NO
ROM (words)
131072
Length
10mm
Height Seated (Max)
1.6mm
Width
10mm
RoHS Status
ROHS3 Compliant
Pricing & Ordering
Quantity
Unit Price
Ext. Price
800
$5.76000
$4608
MC9S08AC128CFGE Product Details
MC9S08AC128CFGE Description
The MC9S08AC128CFGE is an 8-Bit Microcontroller. The Flexis? series' third family, the AC family, consists of pin-compatible 8-bit and 32-bit device duos. On Our Controller Continuum, 8- and 32-bit compatibility is made possible by the Flexis line of controllers.
The MC9S08AC128CFGE pushes the limits of the performance of the 8-bit architecture with 128 KB of flash, three timer/pulse-width modulators (PWM), and a 16-channel, 10-bit analog-to-digital converter (ADC), and a bus frequency of up to 20 MHz. The 32-bit MCF51AC256/128 devices and the 8-bit S08AC128/96/60/48/32 are pin, peripheral, and tool compatible. In order to offer the most significant degree of migration freedom, they share a common set of peripherals and development tools.
MC9S08AC128CFGE Features
Peripherals
ADC — 16-channel, 10-bit resolution, 2.5μs conversion time, automatic compare function, temperature sensor, internal bandgap reference channel
SCIx — Two serial communications interface modules supporting LIN 2.0 Protocol and SAE J2602 protocols; Full duplex non-return to zero (NRZ); Master extended break generation; Slave extended break detection; Wakeup on active edge
SPIx — One full and one master-only serial peripheral interface modules; Full-duplex or single-wire bidirectional; Double-buffered transmit and receive; Master or Slave mode; MSB-first or LSB-first shifting
IIC — Inter-integrated circuit bus module; Up to 100 kbps with maximum bus loading; Multi-master operation; Programmable slave address; Interrupt driven byte-by-byte data transfer; supports broadcast mode and 10 bit addressing
TPMx — One 2-channel and two 6-channel 16-bit timer/pulse-width modulator (TPM) modules: Selectable input capture, output compare, and edge-aligned PWM capability on each channel. Each timer module may be configured for buffered, centered PWM (CPWM) on all channels
KBI — 8-pin keyboard interrupt module
Input/Output
Up to 70 general-purpose input/output pins
Software selectable pullups on input port pins
Software selectable drive strength and slew rate control on ports when used as outputs
Package Options
80-pin low-profile quad flat package (LQFP)
64-pin quad flat package (QFP)
48-pin quad flat no-lead package (QFN)
44-pin low-profile quad flat package (LQFP)
8-Bit HCS08 Central Processor Unit (CPU)
40-MHz HCS08 CPU (central processor unit)
20-MHz internal bus frequency
HC08 instruction set with added BGND, CALL and RTC instructions
Memory Management Unit to support paged memory.
Linear Address Pointer to allow direct page data accesses of the entire memory map
Development Support
Background debugging system
Breakpoint capability to allow single breakpoint setting during in-circuit debugging (plus two more breakpoints in on-chip debug module)
On-chip in-circuit emulator (ICE) Debug module containing three comparators and nine trigger modes. Eight deep FIFO for storing change-of-flow addresses and event-only data. Supports both tag and force breakpoints.
Memory Options
Up to 128K FLASH — read/program/erase over full operating voltage and temperature
Up to 8K Random-access memory (RAM)
Security circuitry to prevent unauthorized access to RAM and FLASH contents
Clock Source Options
Clock source options include crystal, resonator, external clock, or internally generated clock with precision NVM trimming using ICG module
System Protection
Optional computer operating properly (COP) reset with option to run from independent internal clock source or bus clock
CRC module to support fast cyclic redundancy checks on system memory