MC9S08PA4VTG                                 Description

 The 32-bit Arm? Cortex?-M4 processor core MC9S08PA4VTG is the first core of the Cortex-M line up to feature dedicated Digital Signal Processing (DSP) IP blocks, including an optional Floating-Point Unit (FPU).

MC9S08PA4VTG                                Features

? 8-Bit S08 central processor unit (CPU)

– Up to 20 MHz bus at 2.7 V to 5.5 V across operating

temperature range

– Supporting up to 40 interrupt/reset sources

– Supporting up to four-level nested interrupt

– On-chip memory

– Up to 4 KB flash read/program/erase over full

operating voltage and temperature

– Up to 128 byte EEPROM; 2-byte erase sector;

program and erase while executing flash

– Up to 512 byte random-access memory (RAM)

– Flash and RAM access protection

? Power-saving modes

– One low-power stop mode; reduced power wait

mode

– Peripheral clock enable register can disable clocks to

unused modules, reducing currents; allows clocks to

remain enabled to specific peripherals in stop3 mode

? Clocks

– Oscillator (XOSC) - loop-controlled Pierce

oscillator; crystal or ceramic resonator range of

31.25 kHz to 39.0625 kHz or 4 MHz to 20 MHz

– Internal clock source (ICS) - containing a frequencylocked-loop (FLL) controlled by internal or external

reference; precision trimming of internal reference

allowing 1% deviation across temperature range of 0

°C to 70 °C and 2% deviation across whole

operating temperature range; up to 20 MHz

? System protection

– Watchdog with independent clock source

– Low-voltage detection with reset or interrupt;

selectable trip points

– Illegal opcode detection with reset

– Illegal address detection with reset

MC9S08PA4VTG                          Applications

ptional Floating-Point Unit (FPU)