MC9S12XDG128CAA Description

The NXP MC9S12XDG128CAA is a 16-bit Microcontroller based on an enhanced HCS12X CPU (40MHz bus) with CISC architecture operating at a maximum frequency of 80MHz. The device incorporates 128kB internal flash, 12kB internal RAM, 2kB EEPROM, 8-channel 10-bit A/D converter and 59 general-purpose I/O pins. 

MC9S12XDG128CAA Features

• Upward compatible with MC9S12 instruction set

• Interrupt stacking and programmer's model identical to MC9S12

• Instruction queue

• Enhanced indexed addressing

• Enhanced instruction set

• External bus interface (EBI)

• Module mapping control (MMC)

• Interrupt controller (INT)

• Debug module to monitor HCS12X CPU and XGATE bus activity

• Background debug mode (BDM)

• Periodic interrupt timer (PIT)

• Clock and reset generator (CRG)

• Low noise/low power Pierce oscillator

• Enhanced capture timer - 16-bit main counter with 7-bit Prescaler

• 8 PWM (pulse-width modulator) channels

• On-chip voltage regulator

• Low-voltage detection (LVD) with low-voltage interrupt (LVI)

• Power-on reset (POR) circuit

• Low-voltage reset (LVR)

• Ultra-low-power wake-up timer

MC9S12XDG128CAA Applications

• Industrial