MCF5470VR200  Description

The STSPIN32F060x system-in-package is an extremely integrated solution for driving three-phase applications, helping designers to reduce PCB area and overall bill-of-material. It embeds an STM32F031x6x7 featuring an ARM? 32-bit Cortex?-M0 CPU and a600 V triple half-bridge gate driver, able to drive N-channel power MOSFETs rights.

MCF5470VR200  Features

Features list:

ColdFire V4e Core.

- Limited superscalar V4 ColdFire processor core

- Up to 266 MHz peak internal core frequency (410 MIPS

[Dhrystone 2.1] @ 266 MHz)

- Harvard architecture

-32-Kbyte instruction cache

- 32-Kbyte data cache

- Memory Management Unit (MMU)

-Separate, 32-entry, fully-associative instruction and

data translation lookahead buffers

- Floating point unit (FPU)

- Double-precision conforms to IEE-754 standard

- Eight floating point registers

Intemal master bus (XLB) arbiter

- High performance split address and data transactions

-Support for various parking modes

32-bit double data rate (DDR) synchronous DRAM

(SDRAM) controller

66-133 MHz operation

- Supports DDR and SDR DRAM

- Built-in initialization and refresh

- Up to four chip selets enabling up to one GB ofextermal

memory

Version 2. 2 peripheral component interconnect (PCI) bus

-32-bit target and initiator operation

- Support for up to five extemal PCI masters

- 33-66 MHz operation with PCI bus to XLB divider

ratiosof 1:1, 1:2, and 1:4

Flexible multi-function extermal bus (FlexBus)

-Provides a glueless interface to boot flash/ROM,

SRAM, and peripheral devices

- Up to six chip selects

- 33 - 66 MHz operation

Communications LO subsystem

- Intelligent 16 channel DMA controller

- Up to two 10/100 Mbps fast Ethernet controllers (FECs)

each with separate 2-Kbyte receive and transmit FIFOs

- Universal serial bus (USB) version 2.0 device controller

- Support for one control and six programmable