MCF5485CZP200          Description

MCF5485CZP200 is a member of the Coldfire family of 32-bit reduced instruction set computing (RISC) microprocessors. This document provides an overview of the MCF51JM128 series, focusing on its highly integrated and diverse feature set. The MCF51JM128 series is based on the V1 Coldfire core, and the processor core runs at speeds up to 50.33 MHz. As part of the Freescale controller Continuum , it is an ideal upgrade based on the MCF5485CZP200 series 8-bit microcontroller design.

MCF5485CZP200                Features

? ColdFire V4e Core

– Limited superscalar V4 ColdFire processor core

– Up to 200MHz peak internal core frequency (308 MIPS

[Dhrystone 2.1] @ 200 MHz)

– Harvard architecture

– 32-Kbyte instruction cache

– 32-Kbyte data cache

– Memory Management Unit (MMU)

– Separate, 32-entry, fully-associative instruction and

data translation lookahead buffers

– Floating point unit (FPU)

– Double-precision conforms to IEE-754 standard

– Eight floating point registers

? Internal master bus (XLB) arbiter

– High performance split address and data transactions

– Support for various parking modes

? 32-bit double data rate (DDR) synchronous DRAM

(SDRAM) controller

– 66–133 MHz operation

– Supports DDR and SDR DRAM

– Built-in initialization and refresh

– Up to four chip selects enabling up to one GB of external

memory

? Version 2.2 peripheral component interconnect (PCI) bus

– 32-bit target and initiator operation

– Support for up to five external PCI masters

– 33–66 MHz operation with PCI bus to XLB divider

ratios of 1:1, 1:2, and 1:4

? Flexible multi-function external bus (FlexBus)

– Provides a glueless interface to boot flash/ROM,

SRAM, and peripheral devices

– Up to six chip selects

– 33 – 66 MHz operation

MCF5485CZP200               Applications

MCF548X V4ECORE MMU, FPU.