MMC2114CFCAG33 Description

A family of general-purpose microcontroller units (MCUs) based on the M?CORE M210 central processing unit includes the MMC2114 and MMC2113 (CPU). One of the smallest and most complete 32-bit core implementations is the M?CORE M210 CPU architecture. The pipelined reduced instruction set computer (RISC) execution unit maximizes performance and code efficiency while preserving on-chip memory space by using 16-bit instructions. The instruction set is meant to support the implementation of high-level languages. Product development and in-situ testing are supported by a non-intrusive resident debugging solution.

MMC2114CFCAG33 Features

• M?CORE M210 integer processor

• 256 Kbytes (MMC2114) or 128 Kbytes (MMC2113) FLASH memory

• 32 Kbytes (MMC2114) or 8 Kbytes (MMC2113) of static random-access memory (SRAM)

• Serial peripheral interface (SPI)

• Two serial communications interfaces (SCI)

• Two timers

• Queued analog-to-digital converter (QADC)

• 43-source interrupt controller with support for 8 external interrupt pins

• Two periodic interval timers

• Watchdog timer

• Phase-locked loop (PLL)

• Integrated low-voltage detector (LVD)

• General-purpose input/output (GPIO)

• Multiple chip configurations including single-chip or expanded mode operation

• 7 sources of reset

• External bus interface supporting multiple data widths

• OnCE/Joint Test Action Group (JTAG) support for debug and system-level board testing

MMC2114CFCAG33 Applications

• Power Management

• Consumer Electronics

• Portable Devices

• Industrial