The MPC855TVR50D4 Quad Integrated Communications Controller (PowerQUICC?)is a versatile one-chip integrated microprocessor and peripheral combination designed for a variety of controller applications. It particularly excels in both communications and networking systems. The PowerQUICC unit is referred to as the MPC860 in this manual. The MPC855TVR50D4 is a derivative of Motorola’s MC68360 Quad Integrated Communications Controller (QUICC?), referred to here as the QUICC, that implements the PowerPC architecture.
MPC855TVR50D4 Features
Embedded single-issue, 32-bit MPC8xx core (implementing the PowerPC architecture) with thirty-two 32-bit general-purpose registers (GPRs)
Up to 32-bit data bus (dynamic bus sizing for 8, 16, and 32 bits)
Operates at up to 80 MHz
General-purpose timers - Four 16-bit timers or two 32-bit timers
ATM support compliant with ATM Forum UNI 4.0 specification