1mm PowerPC e500v2 1.05V 32-bit Microprocessor QorIQ P2 Series P2020 1.05V 689-BBGA Exposed Pad
SOT-23
P2020NSN2MFC Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Factory Lead Time
12 Weeks
Package / Case
689-BBGA Exposed Pad
Surface Mount
YES
Operating Temperature
0°C~125°C TA
Packaging
Tray
Series
QorIQ P2
Published
2002
JESD-609 Code
e2
Part Status
Active
Moisture Sensitivity Level (MSL)
3 (168 Hours)
Number of Terminations
689
ECCN Code
3A991.A.2
Terminal Finish
TIN COPPER/TIN SILVER
HTS Code
8542.31.00.01
Terminal Position
BOTTOM
Terminal Form
BALL
Peak Reflow Temperature (Cel)
260
Supply Voltage
1.05V
Terminal Pitch
1mm
Time@Peak Reflow Temperature-Max (s)
40
Base Part Number
P2020
JESD-30 Code
S-PBGA-B689
Supply Voltage-Max (Vsup)
1.1V
Power Supplies
1.05V
Supply Voltage-Min (Vsup)
1V
Speed
1.2GHz
uPs/uCs/Peripheral ICs Type
MICROPROCESSOR, RISC
Core Processor
PowerPC e500v2
Clock Frequency
100MHz
Bit Size
32
Address Bus Width
32
Boundary Scan
YES
Low Power Mode
YES
External Data Bus Width
16
Format
FLOATING POINT
Integrated Cache
YES
Ethernet
10/100/1000Mbps (3)
Number of Cores/Bus Width
2 Core 32-Bit
Graphics Acceleration
No
RAM Controllers
DDR2, DDR3
USB
USB 2.0 + PHY (2)
Additional Interfaces
DUART, I2C, MMC/SD, SPI
Length
31mm
Height Seated (Max)
2.46mm
RoHS Status
ROHS3 Compliant
Pricing & Ordering
Quantity
Unit Price
Ext. Price
135
$120.80393
$16308.53055
P2020NSN2MFC Product Details
P2020NSN2MFC Description
The QorIQ? P2020NSN2MFC communications processor delivers high performance per watt for dual- and single-core applications. Using advanced 45nm process technology the P2020NSN2MFC reaches frequencies up to 1.33GHz. Pin-compatible with the QorIQ P1 family devices, the P2020NSN2MFC offers four interchangeable cost-effective solutions, scaling from a single core at 533 MHz (P1011) to a dual-core at 1.33 GHz (P2020) and delivering an impressive 4.5x aggregate frequency range within the same pinout.
P2020NSN2MFC Features
Dual (P2020) or single (P2010) high-performance Power Architecture? e500 cores
Up to 1.33 GHz
32 KB L1 and 512KB L2 caches
Three 10/100/1000 Mbps enhanced three-speed Ethernet controllers (eTSECs)