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P2020NSN2MHC

P2020NSN2MHC

P2020NSN2MHC

NXP USA Inc.

1mm PowerPC e500v2 1.05V 32-bit Microprocessor QorIQ P2 Series P2020 1.05V 689-BBGA Exposed Pad

SOT-23

P2020NSN2MHC Datasheet

non-compliant

In-Stock: 0 items
Specifications
Name Value
Type Parameter
Factory Lead Time 12 Weeks
Package / Case 689-BBGA Exposed Pad
Surface Mount YES
Operating Temperature 0°C~125°C TA
Packaging Tray
Series QorIQ P2
Published 2002
JESD-609 Code e2
Part Status Active
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 689
ECCN Code 3A991.A.2
Terminal Finish Tin/Silver (Sn/Ag)
HTS Code 8542.31.00.01
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.05V
Terminal Pitch 1mm
Time@Peak Reflow Temperature-Max (s) 40
Base Part Number P2020
JESD-30 Code S-PBGA-B689
Supply Voltage-Max (Vsup) 1.1V
Power Supplies 1.05V
Supply Voltage-Min (Vsup) 1V
Speed 1.2GHz
uPs/uCs/Peripheral ICs Type MICROPROCESSOR, RISC
Core Processor PowerPC e500v2
Clock Frequency 100MHz
Bit Size 32
Boundary Scan YES
Low Power Mode YES
Format FIXED POINT
Integrated Cache YES
Ethernet 10/100/1000Mbps (3)
Number of Cores/Bus Width 2 Core 32-Bit
Graphics Acceleration No
RAM Controllers DDR2, DDR3
USB USB 2.0 + PHY (2)
Additional Interfaces DUART, I2C, MMC/SD, SPI
Length 31mm
Height Seated (Max) 2.46mm
RoHS Status ROHS3 Compliant
Pricing & Ordering
Quantity Unit Price Ext. Price
1 $147.88000 $147.88
10 $140.88700 $1408.87
27 $137.88963 $3723.02001
P2020NSN2MHC Product Details

P2020NSN2MHC Description


The P2020NSN2MHC communications processor delivers high performance per watt for dual- and single-core applications. Using advanced 45nm process technology these CPUs reach frequencies up to 1.33GHz.

Pin-compatible with the QorIQ P1 family devices, the P2020NSN2MHC offers four interchangeable cost-effective solutions, scaling from a single core at 533 MHz (P1011) to a dual-core at 1.33 GHz (P2020) and delivering an impressive 4.5x aggregate frequency range within the same pinout.



P2020NSN2MHC Features


Dual high-performance Power Architecture? e500 cores.

512 Kbyte L2 cache with ECC. Also configurable as SRAM and stashing memory.

Three 10/100/1000 Mbps enhanced three-speed Ethernet controllers (eTSECs) 

High-Speed USB controller (USB 2.0)

64-bit DDR2/DDR3 SDRAM memory controller with ECC support

Two four-channel DMA controllers

Two I2C controllers, DUART, timers

Enhanced local bus controller (eLBC)



P2020NSN2MHC Applications


Communications equipment 

Datacom module 

Industrial 

Appliances 

Enterprise systems 

Enterprise projectors


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