P3041NSN7PNC Description

The 36-bit physical address map of the adaptable P3041 is divided into local space and external address space. 32 local access windows (LAWs) within the local 36-bit (64-Gbyte) address space define mapping for the local address map. The P3041 can be mapped into a bigger system address space, like the RapidIO or PCIe 64-bit address environment, using inbound and outgoing translation windows. The address translation and mapping units have this capability (ATMUs).

P3041NSN7PNC Features

Up to 1.5 GHz core clock speed

36 bit physical addressing

64 TLB SuperPages

512-entry, 4-Kbyte pages front-end

128-Kbyte backside L2 cache supporting ECC single-bit error correction

3 Integer units

P3041NSN7PNC Applications

Wearable applications

Low-power wireless applications

Portable products

Battery powered systems