PCA9615DPJ Description

The PCA9615DPJ is a Fast-mode Plus (Fm+) SMBus/I²C-bus buffer that extends the normal single-ended SMBus/I²C-bus through electrically noisy environments using a differential SMBus/I²C-bus (dI²C) physical layer, which is transparent to the SMBus/I²C-bus protocol layer. It consists of two single-ended to differential driver channels for the SCL (serial clock) and SDA (serial data). The use of differential transmission lines between identical dI²C bus buffers removes electrical noise and common-mode offsets that are present when signal lines must pass between different voltage domains, are bundled with hostile signals, or run adjacent to electrical noise sources, such as high-energy power supplies and electric motors.

PCA9615DPJ Features

Lock-up free operation

Supports arbitration and clock stretching across the dI²C-bus buffers

Powered-off and powering-up high-impedance I²C-bus pins

Operating supply voltage (VDD(A)) range of 2.3 V to 5.5 V with single-ended side 5.5 V tolerant

Differential I²C-bus operating supply voltage (VDD(B)) range of 3.0 V to 5.5 V with 5.5 V tolerant. The best operation is at 5 V.

ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101

Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA

Package offering: TSSOP10

PCA9615DPJ Applications

Monitor remote temperature/leak detectors in harsh environments

Control of power supplies in high noise environment

Transmission of I²C-bus between equipment cabinets

Commercial lighting and industrial heating/cooling control

Any application that requires a long I²C-bus runs in electrically noisy environments

Any application with multiple power suppliers and the potential for ground offsets up to 2.5 V