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MC14099BDWR2

MC14099BDWR2

MC14099BDWR2

ON Semiconductor

MC14099BDWR2 datasheet pdf and Latches, Locks product details from ON Semiconductor stock available on our website

SOT-23

MC14099BDWR2 Datasheet

non-compliant

In-Stock: 0 items
Specifications
Name Value
Type Parameter
Factory Lead Time 7 Weeks
Mount Surface Mount
Surface Mount YES
Number of Pins 16
Number of Terminals 16
ECCN (US) EAR99
HTS 8542.39.00.01
Logic Family 4000
Latch Mode Addressable
Number of Channels per Chip 8
Number of Elements per Chip 1
Number of Inputs per Chip 1
Number of Input Enables per Element 1
Number of Selection Inputs per Element 3
Number of Outputs per Chip 8
Number of Output Enables per Element 0
Bus Hold No
Set/Reset Master Reset
Maximum Propagation Delay Time @ Maximum CL (ns) 400@5V|150@10V|100@15V
Absolute Propagation Delay Time (ns) 450
Process Technology CMOS
Maximum Low Level Output Current (mA) 4.2(Min)
Maximum High Level Output Current (mA) -4.2(Min)
Minimum Operating Supply Voltage (V) 3
Typical Operating Supply Voltage (V) 3.3|9|12|5|15
Maximum Operating Supply Voltage (V) 18
Typical Quiescent Current (uA) 0.015
Maximum Quiescent Current (uA) 20
Propagation Delay Test Condition (pF) 50
Minimum Operating Temperature (°C) -55
Maximum Operating Temperature (°C) 125
Standard Package Name SOP
Supplier Package SOIC W
Mounting Surface Mount
Package Height 2.4(Max)
Package Length 10.45(Max)
Package Width 7.6(Max)
PCB changed 16
Lead Shape Gull-wing
Typical Operating Supply Voltage 3.3/5/9/12/15 V
Minimum Operating Supply Voltage 3 V
Maximum Propagation Delay Time @ Maximum CL 400@5V/150@10V/100@15V ns
Maximum Operating Supply Voltage 18 V
Turn-On Delay Time 450 ns
RoHS Non-Compliant
Package Shape RECTANGULAR
Manufacturer ON Semiconductor
Packaging Tape and Reel
Operating Temperature -55 to 125 °C
JESD-609 Code e0
Part Status Obsolete
Type D-Type
Terminal Finish Tin/Lead (Sn/Pb)
Max Operating Temperature 125 °C
Min Operating Temperature -55 °C
Additional Feature 1:8 DMUX FOLLOWED BY LATCH
HTS Code 8542.39.00.01
Subcategory FF/Latches
Packing Method TAPE AND REEL
Technology CMOS
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 225
Number of Functions 1
Terminal Pitch 1.27 mm
Reach Compliance Code not_compliant
Pin Count 16
JESD-30 Code R-PDSO-G16
Qualification Status Not Qualified
Number of Elements 1
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 18 V
Power Supplies 5/15 V
Temperature Grade MILITARY
Supply Voltage-Min (Vsup) 3 V
Number of Circuits 2
Max Supply Voltage 18 V
Min Supply Voltage 3 V
Number of Bits 8
Propagation Delay 100 ns
Family 4000/14000/40000
Logic Function Shift Register
Seated Height-Max 2.65 mm
Output Polarity TRUE
Logic IC Type D LATCH
Trigger Type LOW LEVEL
High Level Output Current -4.2 mA
Propagation Delay (tpd) 400 ns
Low Level Output Current 32 mA
Number of Input Lines 1
Number of Output Lines 8
Width 7.5 mm
Length 10.3 mm
RoHS Status RoHS non-compliant
Lead Free Contains Lead

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