NDS352P datasheet pdf and Transistors - FETs, MOSFETs - Single product details from ON Semiconductor stock available on our website
SOT-23
NDS352P Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Mounting Type
Surface Mount
Package / Case
TO-236-3, SC-59, SOT-23-3
Supplier Device Package
SuperSOT-3
Operating Temperature
-55°C~150°C TJ
Packaging
Tape & Reel (TR)
Part Status
Obsolete
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Technology
MOSFET (Metal Oxide)
Power Dissipation-Max
500mW Ta
FET Type
P-Channel
Rds On (Max) @ Id, Vgs
350mOhm @ 1A, 10V
Vgs(th) (Max) @ Id
2.5V @ 250μA
Input Capacitance (Ciss) (Max) @ Vds
125pF @ 10V
Current - Continuous Drain (Id) @ 25°C
850mA Ta
Gate Charge (Qg) (Max) @ Vgs
4nC @ 5V
Drain to Source Voltage (Vdss)
20V
Drive Voltage (Max Rds On,Min Rds On)
4.5V 10V
Vgs (Max)
±12V
Pricing & Ordering
Quantity
Unit Price
Ext. Price
1
$0.28000
$0.28
500
$0.2772
$138.6
1000
$0.2744
$274.4
1500
$0.2716
$407.4
2000
$0.2688
$537.6
2500
$0.266
$665
NDS352P Product Details
NDS352P Description
These P-Channel logic level enhancement mode power field effect transistors are made utilizing a high cell density DMOS process that is exclusive to Fairchild. This extremely dense technique is specifically designed to reduce on-state resistance. These components are best suited for low voltage applications where quick high-side switching, low in-line power loss, and a very compact shape surface mount package are required, such as notebook computer power management, portable electronics, and other battery driven circuits.
NDS352P Features
-0.85A, -20V. RDS(ON) = 0.5W @ VGS = -4.5V.
Proprietary package design using copper lead frame for superior thermal and electrical capabilities.
High density cell design for extremely low RDS(ON).
Exceptional on-resistance and maximum DC current capability.
Compact industry standard SOT-23 surface mount package.