The R7S721001VLBG#AC0 is a single-chip microcontroller that includes an Arm Cortex®-A9 processor along with the integrated peripheral functions required to configure a system.
R7S721001VLBG#AC0 Features
Am Cortex-A9 processor
Maximum operating frequency: 400 MHz
Instruction cache size: 32 Kbytes
Data cache size: 32 Kbytes (write-back algorithm)
TLB entries: 128 entries
JazelleE architecture extension: Full implementation
Media processing engine with NEONTM technology
Am CoreLinkTM Level 2 Cache Controller L2C-310
Operating frequency: 133 MHz
Cache size: 128 Kbytes
Arm PrimeCell Generic Interrupt Controller (PL 390)
External interrupt pins (NMI, IRQ7 to IRQ0, and TINT170 to TINT0)
On-chip peripheral interrupts: Priority level set for each module
32 priority levels available
Address space is divided into six areas (0 to 5). each a maximum of 64 Mbytes