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UPA650TT

UPA650TT

UPA650TT

RENESAS ELECTRONICS CORP

UPA650TT datasheet pdf and Unclassified product details from RENESAS ELECTRONICS CORP stock available on our website

SOT-23

UPA650TT Datasheet

non-compliant

In-Stock: 0 items
Specifications
Name Value
Type Parameter
Surface Mount YES
Number of Terminals 6
Transistor Element Material SILICON
JESD-609 Code e0
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn/Pb)
HTS Code 8541.21.00.95
Subcategory Other Transistors
Terminal Position DUAL
Terminal Form FLAT
Peak Reflow Temperature (Cel) NOT SPECIFIED
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Pin Count 6
JESD-30 Code R-PDSO-F6
Qualification Status Not Qualified
Operating Temperature (Max) 150°C
Number of Elements 1
Configuration SINGLE WITH BUILT-IN DIODE
Operating Mode ENHANCEMENT MODE
Transistor Application SWITCHING
Polarity/Channel Type P-CHANNEL
Drain Current-Max (Abs) (ID) 5A
Drain-source On Resistance-Max 0.068Ohm
DS Breakdown Voltage-Min 12V
FET Technology METAL-OXIDE SEMICONDUCTOR
Power Dissipation-Max (Abs) 1.4W
RoHS Status Non-RoHS Compliant

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