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SN74HC574DWRG4

SN74HC574DWRG4

SN74HC574DWRG4

Rochester Electronics, LLC

2V~6V 40MHz D-Type Flip Flop 8μA 74HC Series 20-SOIC (0.295, 7.50mm Width)

SOT-23

SN74HC574DWRG4 Datasheet

non-compliant

In-Stock: 0 items
Specifications
Name Value
Type Parameter
Mounting Type Surface Mount
Package / Case 20-SOIC (0.295, 7.50mm Width)
Supplier Device Package 20-SOIC
Operating Temperature -40°C~85°C TA
Packaging Tape & Reel (TR)
Series 74HC
Part Status Obsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Type D-Type
Voltage - Supply 2V~6V
Function Standard
Output Type Tri-State, Non-Inverted
Number of Elements 1
Clock Frequency 40MHz
Current - Quiescent (Iq) 8μA
Current - Output High, Low 7.8mA 7.8mA
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 31ns @ 6V, 50pF
Trigger Type Positive Edge
Input Capacitance 3pF
RoHS Status ROHS3 Compliant
Pricing & Ordering
Quantity Unit Price Ext. Price
1 $0.327981 $0.327981
10 $0.309416 $3.09416
100 $0.291902 $29.1902
500 $0.275379 $137.6895
1000 $0.259792 $259.792
SN74HC574DWRG4 Product Details

SN74HC574DWRG4 Overview


20-SOIC (0.295, 7.50mm Width)is the way it is packaged. D flip flop is embedded in the Tape & Reel (TR) package. T flip flop uses Tri-State, Non-Invertedas its output configuration. JK flip flop uses Positive Edgeas the trigger. This electronic part is mounted in the way of Surface Mount. With a supply voltage of 2V~6V volts, it operates. -40°C~85°C TAis the operating temperature. This logic flip flop is classified as type D-Type. It belongs to the 74HCseries of FPGAs. Its output frequency should not exceed 40MHz Hz. A total of 1 elements are present. During its operation, it consumes 8μA quiescent energy. Input capacitance of this device is 3pF farads.

SN74HC574DWRG4 Features


Tape & Reel (TR) package
74HC series

SN74HC574DWRG4 Applications


There are a lot of Rochester Electronics, LLC SN74HC574DWRG4 Flip Flops applications.

  • Balanced Propagation Delays
  • Buffered Clock
  • Consumer
  • Test & Measurement
  • Data transfer
  • ESD protection
  • Buffer registers
  • Bus hold
  • Matched Rise and Fall
  • Set-reset capability

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