1.65V~5.5V 140MHz 1 Bit D-Type Flip Flop BOTTOM 10μA 74LVC Series 8-XFBGA, DSBGA
SOT-23
SN74LVC2G74YEPR Datasheet
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Specifications
Name
Value
Type
Parameter
Mounting Type
Surface Mount
Package / Case
8-XFBGA, DSBGA
Surface Mount
YES
Operating Temperature
-40°C~85°C TA
Packaging
Tape & Reel (TR)
Series
74LVC
JESD-609 Code
e0
Pbfree Code
no
Part Status
Obsolete
Moisture Sensitivity Level (MSL)
3 (168 Hours)
Number of Terminations
8
Type
D-Type
Terminal Finish
TIN LEAD
Technology
CMOS
Voltage - Supply
1.65V~5.5V
Terminal Position
BOTTOM
Terminal Form
BALL
Peak Reflow Temperature (Cel)
260
Supply Voltage
1.8V
Terminal Pitch
0.5mm
[email protected] Reflow Temperature-Max (s)
NOT SPECIFIED
JESD-30 Code
R-XBGA-B8
Function
Set(Preset) and Reset
Qualification Status
COMMERCIAL
Output Type
Differential
Number of Elements
1
Supply Voltage-Max (Vsup)
5.5V
Number of Bits
1
Clock Frequency
140MHz
Family
LVC/LCX/Z
Current - Quiescent (Iq)
10μA
Output Characteristics
3-STATE
Current - Output High, Low
32mA 32mA
Output Polarity
COMPLEMENTARY
Max Propagation Delay @ V, Max CL
5.4ns @ 5V, 50pF
Trigger Type
Positive Edge
Input Capacitance
5pF
fmax-Min
200 MHz
Height Seated (Max)
0.5mm
Width
0.9mm
RoHS Status
Non-RoHS Compliant
Pricing & Ordering
Quantity
Unit Price
Ext. Price
1
$0.44000
$0.44
500
$0.4356
$217.8
1000
$0.4312
$431.2
1500
$0.4268
$640.2
2000
$0.4224
$844.8
2500
$0.418
$1045
SN74LVC2G74YEPR Product Details
SN74LVC2G74YEPR Overview
The flip flop is packaged in a case of 8-XFBGA, DSBGA. Package Tape & Reel (TR)embeds it. There is a Differentialoutput configured with it. The trigger it is configured with uses Positive Edge. It is mounted in the way of Surface Mount. A voltage of 1.65V~5.5Vis required for its operation. It is at -40°C~85°C TAdegrees Celsius that the system is operating. This logic flip flop is classified as type D-Type. In FPGA terms, D flip flop is a type of 74LVCseries FPGA. A frequency of 140MHzshould not be exceeded by its output. The element count is 1 . It consumes 10μA of quiescent current without being affected by external factors. Terminations are 8. A voltage of 1.8V provides power to the D latch. A JK flip flop with a 5pFfarad input capacitance is used here. Electronic devices of this type belong to the LVC/LCX/Zfamily. An electronic part designed with 1bits is used in this application. Vsup reaches 5.5V, the maximal supply voltage.
SN74LVC2G74YEPR Features
Tape & Reel (TR) package 74LVC series 1 Bits
SN74LVC2G74YEPR Applications
There are a lot of Rochester Electronics, LLC SN74LVC2G74YEPR Flip Flops applications.