SI52204-A01AGM                           Description

The Si52212/08/04/02 are the industry's highest performance and lowest power PCI Express clock generator family for 1.5–1.8 V PCIe Gen 1/2/3/4/5 and SRIS applications.

The Si52212, Si52208, and Si52204 can source twelve, eight, and four 100 MHz PCIe differential clock outputs, respectively, plus one 25 MHz LVCMOS reference clock output. The Si52202 can source two 100 MHz PCIe clock outputs only. All differential clock outputs are compliant to PCIe Gen1/2/3/4/5 common clock and separate reference clock architectures specifications.

SI52204-A01AGM                           Applications

• Servers

• Storage

• Data Centers

• PCIe Add-on Cards

• Network Interface Cards (NIC)

• Graphics Adapter Cards

• Multi-function Printers

• Digital Single-Lens Reflex (DSLR) Cameras

• Digital Still Cameras

• Digital Video Cameras

• Docking Stations

SI52204-A01AGM                            Features

• 12/8/4/2-output 100 MHz PCIe Gen 1/2/3/4/5 and SRIS compliant clock generator, with push-pull HCSL output drivers

• High port count with push-pull HCSL outputs to support highly integrated solution, eliminating external resistors for the HCSL

output drivers

• Low jitter of 0.13 ps rms max to meet PCIe Gen5 specifications with design margin

• Low power consumption.

• Lowest power consumption in the industry for a 2-output PCIe clock generator

• Individual hardware control pins and I2C controls for Output Enable, Spread Spectrum Enable and Frequency Select

• Output Enable function easily disables unused outputs for power saving

• Spread Enable function to turn on/off spread spectrum and to select spread levels, either down spread 0.25% or 0.5%

• Frequency Select function to select output frequency of 100 MHz, 133 MHz, or 200 MHz (except Si52202 where the output

frequency is limited to 100 MHz. Please contact Skyworks for 133 MHz or 200 MHz in Si52202)

• All above functions are controlled by individual hardware pins or I2C

• Internal 100 Ω or 85 Ω impedance matching

• Eliminates external line matching resistor to reduce board space

• Adjustable slew rate to improve signal quality for different applications and board designs

• Power down (PWRDNb) function supports Wake-on LAN (except Si52202)

• One non-spread, 25 MHz LVMCOS reference clock output (except Si52202)

• A buffered 25 MHz LVCMOS clock output to drive ASICS or SoCs on board

• 25 MHz reference input

• Supports a standard crystal or clock input for flexibility

• I

2C support with readback capabilities