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SI5327B-C-GMR

SI5327B-C-GMR

SI5327B-C-GMR

Silicon Labs

1.8V Clock Multiplier, Jitter Attenuator 808MHz SI5327 Clock Generators DSPLL® Series 36 Pins 36-VFQFN Exposed Pad 36 Terminals Surface Mount 1.71V~3.63V Tape & Reel (TR)

SOT-23

SI5327B-C-GMR Datasheet

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In-Stock: 0 items
Specifications
Name Value
Type Parameter
Factory Lead Time 6 Weeks
Mounting Type Surface Mount
Package / Case 36-VFQFN Exposed Pad
Surface Mount YES
Number of Pins 36
Operating Temperature -40°C~85°C
Packaging Tape & Reel (TR)
Published 2003
Series DSPLL®
Part Status Active
Moisture Sensitivity Level (MSL) 2 (1 Year)
Number of Terminations 36
ECCN Code EAR99
Type Clock Multiplier, Jitter Attenuator
Subcategory Clock Generators
Voltage - Supply 1.71V~3.63V
Terminal Position QUAD
Terminal Form NO LEAD
Peak Reflow Temperature (Cel) NOT SPECIFIED
Supply Voltage 1.8V
Terminal Pitch 0.5mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Base Part Number SI5327
Output CML, LVCMOS, LVDS, LVPECL
Pin Count 36
Number of Outputs 2
Qualification Status Not Qualified
Number of Circuits 1
Frequency (Max) 808MHz
Input LVCMOS, LVDS, LVPECL, Crystal
Ratio - Input:Output 3:2
Primary Clock/Crystal Frequency-Nom 710MHz
PLL Yes
Differential - Input:Output Yes/Yes
Height Seated (Max) 0.9mm
Length 6mm
Width 6mm
RoHS Status RoHS Compliant
Pricing & Ordering
Quantity Unit Price Ext. Price
2,500 $25.98750 $51.975
SI5327B-C-GMR Product Details

SI5327B-C-GMR Overview


Clock generator is packaged in the way of Tape & Reel (TR). Clock PLL is embedded in the 36-VFQFN Exposed Pad package. The peak reflow temperature (Cel) amounts to NOT SPECIFIED to be essentially indestructible. 36 terminations can be found in frequency generators. The supply voltage of 1.8V allows for high efficiency. LVCMOS, LVDS, LVPECL, Crystal is designed for clock generator's input. 1 circuits are used to achieve clock PLL's superior flexibility. 808MHz is the maximal value for normal operation. PLL clock is mounted in the way of Surface Mount. Clock generators should operate with the voltage supply of 1.71V~3.63V. The temperature should be set at -40°C~85°C to ensure reliable performance. CML, LVCMOS, LVDS, LVPECL is designed for clock generator's output. This electronic component can be classified into Clock Multiplier, Jitter Attenuator. Clock PLL is equipped with 36 pin count. According to the base part number, its related parts can be founded. Clock generator is designed with 36 pins. Clock generator can also be included into Clock Generators. This clock generator is a member of DSPLL® series. Clock PLL is configured with 2 output.

SI5327B-C-GMR Features


Available in the 36-VFQFN Exposed Pad
Supply voltage of 1.8V


SI5327B-C-GMR Applications


There are a lot of Silicon Labs
SI5327B-C-GMR Clock Generators applications.


  • Wireless infrastructure
  • Instrument
  • Automatic test equipment
  • Wide area power system
  • Digital circuits
  • Wireless base station for LTE, LTE-advanced
  • Picocells, femtocells and small cells
  • Sampling clocks for ADC and DAC
  • 1 Gigabit Ethernet
  • 10 Gigabit Ethernet

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