Clock Jitter Attenuator 735MHz 2.94912GHz Clock Generators 64-VFQFN Exposed Pad Surface Mount 1.71V~3.47V Tray
SOT-23
SI5381E-E-GM Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Mounting Type
Surface Mount
Package / Case
64-VFQFN Exposed Pad
Operating Temperature
-40°C~85°C
Packaging
Tray
Part Status
Obsolete
ECCN Code
EAR99
Type
Clock Jitter Attenuator
Voltage - Supply
1.71V~3.47V
Peak Reflow Temperature (Cel)
NOT SPECIFIED
[email protected] Reflow Temperature-Max (s)
NOT SPECIFIED
Output
HCSL, LVCMOS, LVDS, LVPECL
Number of Circuits
4
Frequency (Max)
735MHz 2.94912GHz
Input
LVCMOS, Crystal
Ratio - Input:Output
4:12
PLL
Yes
Differential - Input:Output
Yes/Yes
Divider/Multiplier
Yes/No
RoHS Status
RoHS Compliant
Pricing & Ordering
Quantity
Unit Price
Ext. Price
260
$16.51862
$4294.8412
SI5381E-E-GM Product Details
SI5381E-E-GM Overview
Clock generator is packaged in the way of Tray. The 64-VFQFN Exposed Pad package includes this clock generator. The frequency generator is capable of withstanding a maximum temperature of NOT SPECIFIED during reflowing. It is designed that the Clock PLL's input should be LVCMOS, Crystal. It is possible to access the full performance of the electrical part by implementing 4 circuits. 735MHz 2.94912GHz is the maximal value for normal operation. Because of the Surface Mount, clock PLL can be easily mounted on the panel. Clock PLL works with 1.71V~3.47V supply voltage provided. Test statistics suggest setting the ambient temperature at -40°C~85°C, which is -40°C~85°C. As the name suggests, this is a clock generator that is compatible with HCSL, LVCMOS, LVDS, LVPECL logic levels. This electronic component can be classified into Clock Jitter Attenuator.
SI5381E-E-GM Features
Available in the 64-VFQFN Exposed Pad
SI5381E-E-GM Applications
There are a lot of Silicon Labs SI5381E-E-GM Clock Generators applications.
Digital switching systems
Microwave backhaul IF
Camera systems
Frequency synthesis
Satellite receivers
Signal frequency synthesis circuits
Small signal recovery
Symbol synchronization
Clock signals to the high-speed Digital RF circuits