Core: ARM? 32-bit Cortex? -M3 CPU
72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access
Single-cycle multiplication and hardware division
Memories
256 to 512 Kbytes of Flash memory
up to 64 Kbytes of SRAM
Flexible static memory controller with 4 Chip Select. Supports Compact Flash, SRAM, PSRAM, NOR and NAND memories
LCD parallel interface, 8080/6800 modes
Clock, reset and supply management
2.0 to 3.6 V application supply and I/Os
POR, PDR, and programmable voltage detector (PVD)
4-to-16 MHz crystal oscillator
Internal 8 MHz factory-trimmed RC
Internal 40 kHz RC with calibration
32 kHz oscillator for RTC with calibration
Low power
Sleep, Stop and Standby modes
VBATsupply for RTC and backup registers
3 × 12-bit, 1 μs A/D converters (up to 21 channels)
Conversion range: 0 to 3.6 V
Triple-sample and hold capability
Temperature sensor
2 × 12-bit D/A converters
DMA: 12-channel DMA controller
Supported peripherals: timers, ADCs, DAC, SDIO, I2Ss, SPIs, I2Cs and USARTs
Debug mode
Serial wire debug (SWD) & JTAG interfaces
Cortex? -M3 Embedded Trace Macrocell?
Up to 112 fast I/O ports
51/80/112 I/Os, all mappable on 16 external interrupt vectors and almost all 5 V-tolerant
Up to 11 timers
Up to four 16-bit timers, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
2 × 16-bit motor control PWM timers with dead-time generation and emergency stop
2 × watchdog timers (Independent and Window)
SysTick timer: a 24-bit down counter
2 × 16-bit basic timers to drive the DAC
Up to 13 communication interfaces
Up to 2 × I2C interfaces (SMBus/PMBus)
Up to 5 USARTs (ISO 7816 interface, LIN, IrDA capability, modem control)
Up to 3 SPIs (18 Mbit/s), 2 with I2S interface multiplexed
CAN interface (2.0B Active)
USB 2.0 full speed interface
SDIO interface
CRC calculation unit, 96-bit unique ID
ECOPACK? packages
