STM32F207ZET6              Description

 The STM32F207ZET6 series is based on a high-performance ARM Cortex - M3 32-bit RISC kernel that runs at up to 120 MHz. The series integrates high-speed embedded memory (flash memory up to 1 MB, system SRAM up to 128K bytes), backup SRAM up to 4K bytes, as well as various enhanced I AHB O and peripherals connected to two APB buses, three AHB buses and a 32-bit multi-AHB bus matrix. These devices are also equipped with adaptive real-time memory accelerators (ART Accelerators), which allow performance equivalent to executing 0-wait-state programs from flash memory at CPU frequencies up to 120 MHz. This performance has been validated using the CoreMark benchmark.

STM32F207ZET6                  Features

· Core: Arm? 32-bit Cortex?-M3 CPU (120 MHz

max) with Adaptive real-time accelerator (ART

Accelerator?) allowing 0-wait state execution

performance from Flash memory, MPU,

150 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1)

· Memories

– Up to 1 Mbyte of Flash memory

– 512 bytes of OTP memory

– Up to 128 + 4 Kbytes of SRAM

– Flexible static memory controller that

supports Compact Flash, SRAM, PSRAM,

NOR and NAND memories

– LCD parallel interface, 8080/6800 modes

· Clock, reset and supply management

– From 1.8 to 3.6 V application supply + I/Os

– POR, PDR, PVD and BOR

– 4 to 26 MHz crystal oscillator

– Internal 16 MHz factory-trimmed RC

– 32 kHz oscillator for RTC with calibration

– Internal 32 kHz RC with calibration

· Low-power modes

– Sleep, Stop and Standby modes

– VBAT supply for RTC, 20 × 32 bit backup

registers, and optional 4 Kbytes backup

SRAM

· 3 × 12-bit, 0.5 μs ADCs with up to 24 channels

and up to 6 MSPS in triple interleaved mode

· 2 × 12-bit D/A converters

· General-purpose DMA: 16-stream controller

with centralized FIFOs and burst support

STM32F207ZET6                     Applications

memory accelerators