The STM32F769BGT6 device is based on the high-performance Arm? Cortex?-M7 32-bit RISC core operating at up to 216 MHz frequency.
STM32F769BGT6 Features
Core: Arm? 32-bit Cortex?-M7 CPU with DPFPU, ART Accelerator and L1-cache: 16 Kbytes I/D cache, allowing 0-wait state execution from embedded Flash and external memories, up to 216 MHz, MPU, 462 DMIPS/2.14 DMIPS/MHz (Dhrystone 2.1), and DSP instructions.
Up to 2 Mbytes of Flash memory organized into two banks allowing read-while-write
SRAM: 512 Kbytes (including 128 Kbytes of data TCM RAM for critical real-time data) + 16 Kbytes of instruction TCM RAM (for critical real-time routines) + 4 Kbytes of backup SRAM
Flexible external memory controller with up to 32-bit data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories
Dual mode Quad-SPI
3×12-bit, 2.4 MSPS ADC: up to 24 channels
Digital filters for sigma delta modulator (DFSDM), 8 channels / 4 filters
2×12-bit D/A converters
General-purpose DMA: 16-stream DMA controller with FIFOs and burst support
Up to 18 timers: up to thirteen 16-bit (1x low-power 16-bit timer available in Stop mode) and two 32-bit timers, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input. All 15 timers run up to 216 MHz. 2x watchdogs, SysTick timer
8- to the 14-bit camera interface up to 54 Mbyte/s