The STM32H755XIH6 is built around the powerful Arm? Cortex?-M7 and Cortex?-M4 32-bit RISC processors. It has high-speed embedded memories with a dual-bank Flash memory of 2 Mbytes, up to 1 Mbyte of RAM (including 192 Kbytes of TCM RAM, up to 864 Kbytes of user SRAM, and 4 Kbytes of backup SRAM), as well as a wide range of enhanced I/Os and peripherals connected to APB buses, AHB buses, a 2x32-bit multi-AHB bus matrix, and a multi-layer AXI interconnect supporting
STM32H755XIH6 Features
32-bit Arm? Cortex?-M7 core with double-precision FPU and L1 cache: 16 Kbytes of data and 16 Kbytes of instruction cache; frequency
up to 480 MHz, MPU, 1027 DMIPS/ 2.14 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
4× I2Cs FM+ interfaces (SMBus/PMBus)
4× USARTs/4x UARTs (ISO7816 interface, LIN, IrDA, up to 12.5 Mbit/s) and 1x LPUART
6× SPIs, 3 with muxed duplex I2S audio class accuracy via internal audio PLL or external clock, 1x I2S in LP domain (up to 150 MHz)
4x SAIs (serial audio interface)
2 Mbytes of Flash memory with read-while-write support