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5962-8860701KA

5962-8860701KA

5962-8860701KA

Texas Instruments

16 Bit Shift Register 1.27mm 5V

SOT-23

5962-8860701KA Datasheet

non-compliant

In-Stock: 0 items
Specifications
Name Value
Type Parameter
Surface Mount YES
JESD-609 Code e0
Pbfree Code no
Number of Terminations 24
Terminal Finish TIN LEAD
Additional Feature SISO OPERATION ALSO AVAILABLE
HTS Code 8542.39.00.01
Subcategory Shift Register
Technology TTL
Terminal Position DUAL
Terminal Form FLAT
Number of Functions 1
Supply Voltage 5V
Terminal Pitch 1.27mm
Pin Count 24
JESD-30 Code R-GDFP-F24
Qualification Status Qualified
Operating Temperature (Max) 125°C
Operating Temperature (Min) -55°C
Supply Voltage-Max (Vsup) 5.5V
Temperature Grade MILITARY
Supply Voltage-Min (Vsup) 4.5V
Number of Bits 16
Family LS
Output Characteristics 3-STATE
Output Polarity TRUE
Logic IC Type PARALLEL IN SERIAL OUT
Screening Level MIL-STD-883
Trigger Type NEGATIVE EDGE
Propagation Delay (tpd) 40 ns
fmax-Min 20 MHz
Count Direction RIGHT
Length 14.36mm
Height Seated (Max) 2.29mm
Width 9.085mm
RoHS Status Non-RoHS Compliant
Lead Free Contains Lead
5962-8860701KA Product Details

5962-8860701KA Overview


Taking the total number of terminations on the chip and adding them up, we get 24. The part operates at 5V voltage. There is an electronic component in the LS. The following additional aspects of this section are worth noting: SISO OPERATION ALSO AVAILABLE. For this part, the minimum supply voltage (Vsup) should not be less than 4.5V. Ideally, the maximum supply voltage (Vsup) should not exceed 5.5V. A total of 16 bits are present on the IC chip. It has a total of zero pins. It belongs to the subcategory of Shift Register. No temperature higher than 125°C should be used.

5962-8860701KA Features




5962-8860701KA Applications


There are a lot of Texas Instruments
5962-8860701KA Shift Registers applications.


  • Data Processors
  • Pseudo Random Pattern Generator
  • Pulse Extenders
  • Pattern Recognizers
  • Interconnectors
  • Counter
  • Data manipulation
  • Delay Line
  • Generate time delay toward digital circuits
  • Parallel data

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